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US 6,650,015 B2Granted
Cavity-down ball grid array package with semiconductor chip solder ball
AssigneeSiliconware Precision Industries Co., Ltd.
InventorsEing-Chieh Chen, Shiu-Tai Tzung, Ting-Ke Chai, Jeng-Yuan Lai, Candy Tien
Life of this patent
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Abstract
A cavity-down ball grid array package includes a substrate having a through cavity provided therein. A heat sink is attached to the substrate and a semiconductor chip in the cavity is attached to the heat sink and electrically connected to the substrate. A ball grid array is on the substrate and on the semiconductor chip.
Claims10
A cavity-down ball grid army package comprising:
- a substrate having a through cavity provided therein;
- a heat sink attached to the substrate;
- a semiconductor chip in the cavity attached to the heat sink and electrically connected to the substrate;
- and
- a ball grid array on the substrate and on the semiconductor chip;
- bonding wires electrically connecting the semiconductor chip to the substrate;
- and
- an encapsulation body encapsulating the bonding wires and exposing a portion of the semiconductor chip for a portion of the ball grid array to be on the semiconductor chip.
5 more elements
A cavity-down ball grid array package comprising:
- a substrate having a top surface and a bottom surface and formed with a cavity;
- the substrate further including a plurality of electrically-conductive traces on the bottom surface thereof;
- a heat sink attached to the top surface of the substrate;
- a semiconductor chip having an active surface and an inactive surface, the active surface is formed with a plurality of input/output pads and a plurality of power/ground pads, the semiconductor chip being mounted within the cavity in the substrate with the inactive surface thereof being attached to the heat sink;
- a set of bonding wires for electrically connecting the input/output pads to corresponding electrically-conductive traces on the bottom surface of the substrate;
- a ball grid array, including a plurality of heat-dissipation solder balls which are deposited on the active surface of the semiconductor chip;
- an encapsulation body for encapsulating part of the semiconductor chip while exposing the active surface of the semiconductor chip.
4 more elements
A cavity-down ball grid array package comprising:
- a substrate having a top surface and a bottom surface and formed with a centrally-located cavity, the substrate further including a plurality of electrically-conductive traces on the bottom surface thereof;
- a heat sink attached to the top surface of the substrate;
- at least one semiconductor chip having an active surface and an inactive surface, and the active surface is formed with a plurality of input/output pads and a plurality of power/ground pads, and further formed with a plurality of solder-ball pads connected respectively by a plurality of redistribution layer lines to the power/ground pads, the semiconductor chip being mounted within the cavity in the substrate with the inactive surface thereof being attached to the heat sink;
- a set of bonding wires for electrically connecting the input/output pads to corresponding electrically-conductive traces on the bottom surface of the substrate;
- an encapsulation body for encapsulating part of the semiconductor chip while exposing the solder-ball pads on the active surface of the semiconductor chip;
- and
- a ball grid array, including a plurality of input/output solder balls and a plurality of power/ground solder balls;
- wherein the input/output solder balls are electrically connected to corresponding electrically-conductive traces on the bottom surface of the substrate, while the power/ground solder balls are electrically connected to the solder-ball pads on the exposed active surface of the semiconductor chip.
5 more elements
A cavity-down ball grid array package comprising:
- a substrate having a top surface and a bottom surface and formed with a centrally-located cavity, the substrate further including a plurality of electrically-conductive traces on the bottom surface thereof;
- a heat sink attached to the top surface of the substrate;
- at least one semiconductor chip having an active surface and an inactive surface, and the active surface is formed with a plurality of input/output pads and a plurality of power/ground pads, and further formed with a plurality of centrally-located dummy pads, the semiconductor chip being mounted within the cavity in the substrate with the inactive surface thereof being attached to the heat sink;
- a set of bonding wires for electrically connecting the input/output pads and the power/ground pads to corresponding electrically-conductive traces on the bottom surface of the substrate;
- an encapsulation body for encapsulating part of the semiconductor chip while exposing the dummy pads on the active surface of the semiconductor chip;
- and a ball grid array, including a plurality of input/output solder balls, a plurality of power/ground solder balls, and a plurality of heat-dissipation solder balls, wherein the input/output solder balls and the power/ground solder balls are electrically connected to corresponding electrically-conductive traces on the bottom surface of the substrate, while the heat-dissipation solder balls are electrically connected to the dummy pads on the active surface of the semiconductor chip.
3 more elements
Dependencies are inferred from the claim text.