Lateral semiconductor device and vertical semiconductor device
AssigneeKabushiki Kaisha Toshiba
InventorsYoshihiro Yamaguchi, Hideaki Ninomiya, Tomoki Inoue
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AssigneeKabushiki Kaisha Toshiba
InventorsYoshihiro Yamaguchi, Hideaki Ninomiya, Tomoki Inoue
Estimating the term…
A lateral semiconductor device includes an n-type buffer layer (15) selectively formed in the surface of an n-type base layer (14), a p-type drain layer (16) selectively formed in the surface of the n-type buffer layer (15), a p-type base layer (17) formed in the surface of the n-type base layer (14) so as to surround the n-type buffer layer (15), an n+-type source layer (18) selectively formed in the surface of the p-type base layer (17), a source electrode (24) in contact with the p-type base layer (17) and the n+-type source layer (18), a drain electrode (22) in contact with the p-type drain layer (16), and a gate electrode (20) formed via a gate insulating film (19) on the surface of the p-type base layer (17) sandwiched between the n+-type source layer (18) and the n-type base layer (14). The p-type drain layer (16) has an annular structure or horseshoe-shaped structure, or is divided into a plurality of portions. This realizes a high breakdown voltage with a low ON voltage.
A lateral semiconductor device comprising:
Dependencies are inferred from the claim text.