Ferroelectric capacitor having upper electrode lamination

A ferroelectric capacitor, comprising:

• a base substrate having an insulating surface;
• a lower electrode formed on said insulating surface;
• an oxide ferroelectric layer formed on said lower electrode,
• a first oxide upper electrode formed on and in contact with an upper surface of said oxide ferroelectric layer;
• and
• a second oxide upper electrode formed on said first oxide upper electrode,
• wherein one of said first and second oxide upper electrodes comprises CaRuOx or LaRuOx that contains at least 0.1 at % additive and other of said first and second oxide upper electrodes comprises IrOx.

A ferroelectric capacitor, comprising:

• a base substrate having an insulating surface;
• a lower electrode formed on said insulating surface;
• an oxide ferroelectric layer formed on said lower electrode;
• a first oxide upper electrode formed on and in contact with the upper surface of said oxide ferroelectric layer, and
• a second oxide upper electrode formed on said first oxide upper electrode,
• wherein one of said first and second oxide upper electrodes comprises LaNiOx or (La, Sr)COx that contains at least 0.1 at % additive and other of said first and second oxide upper electrodes comprises IrOx.

A non-volatile semiconductor memory, comprising:

• a semiconductor substrate formed with semiconductor elements and having an insulator film at a surface;
• a lower electrode formed on said insulator film;
• an oxide ferroelectric layer formed on said lower electrode;
• a first oxide upper electrode formed on and in contact with upper surface of said oxide ferroelectric layer;
• and
• a second oxide upper electrode formed on said first oxide upper electrode,
• wherein one of said first and second oxide upper electrodes comprises SRO that contains at least 0.1 at % additive and other of said first and second oxide upper electrodes comprises IrOx.

A non-volatile semiconductor memory, comprising:

• a semiconductor substrate forming with semiconductor elements and having an insulator film at a surface;
• a lower electrode formed on said insulator film;
• an oxide ferroelectric layer formed on said lower electrode;
• a first oxide upper electrode formed on and in contact with upper surface of said oxide ferroelectric layer;
• and
• a second oxide upper electrode formed on said first oxide upper electrode,
• wherein one of said first and second oxide upper electrodes comprises CaRuOx or LaRuOx that contains at least 0.1 at % additive and other of said first and second oxide upper electrodes comprises IrOx.

A non-volatile semiconductor memory comprising:

• a semiconductor substrate formed with semiconductor elements and having an insulator film at a surface;
• a lower electrode formed on said insulator film;
• an oxide ferroelectric layer formed on said lower electrode;
• a first oxide upper electrode formed on and in contact with upper surface of said oxide ferroelectric layer;
• and
• a second oxide upper electrode formed on said first oxide upper electrode,
• wherein one of said first and second oxide upper electrodes comprises LaNiOx or (La, Sr)COx that contains at least 0.1 at % additive and the other of said first and second oxide upper electrodes comprises IrOx.