Self-aligned, planarized thin-film transistors, devices employing the same

A semiconductor device comprising:

• a first field-effect transistor comprising a first source, a first drain and a gate;
• a second field-effect transistor comprising a second source, a second drain and said gate, wherein said gate is shared by said first field-effect transistor and said second field-effect transistor;
• wherein said second source and said second drain are self-aligned to said gate in a layer of planarized semiconductor above said first field-effect transistor;
• and
• further comprising a doped insulator layer underneath and surrounding multiple sides of the second field-effect transistor, wherein the second source and the second drain are formed by out diffusion of dopant from the doped insulator layer underneath the second field-effect transistor, and wherein a body of the second field-effect transistor is protected from the out diffusion by said gate.

A semiconductor device comprising:

• a masking structure;
• a semiconductor material layer disposed over the masking structure;
• a doped dielectric layer adjacent to said semiconductor material layer;
• wherein said semiconductor material layer is doped self-aligned to said masking structure from said doped dielectric layer;
• wherein the masking structure comprises a gate of a field-effect transistor, and said semiconductor material layer comprises a body, a source diffusion and a drain diffusion of said field-effect transistor;
• and
• wherein said gate comprises a U-shaped wrap-around gate at a body of the field-effect transistor.