Method of manufacturing thin film transistor liquid crystal display

A method for manufacturing a thin film transistor (TFT), comprising the steps of:

• providing a substrate;
• depositing a conductive layer above the substrate to form a gate electrode of the thin film transistor;
• forming an insulating layer above the conductive layer and the substrate;
• forming a semiconductor layer on the insulating layer;
• forming a sacrifice layer with an island shape on the semiconductor layer, and the sacrifice layer being positioned directly above the gate electrode;
• forming a doped silicon layer on the sacrifice layer and the semiconductor layer;
• forming a metal layer covering the doped silicon layer;
• patterning the metal layer to form a source electrode and a drain electrode, a channel being defined between the source electrode and the drain electrode, a non-TFT region being defined as a portion of the substrate not covered by the source electrode, the drain electrode and the channel, and the doped silicon layer being exposed in the channel and the non-TFT region;
• using the source and the drain electrodes as a mask to perform the following etching processes at the same time during a predetermined period:
• (a)removing the doped silicon layer and the island-shaped sacrifice layer within the channel so as to expose the semiconductor layer in the channel;
• and (b)removing the doped silicon layer and the semiconductor layer in the non-TFT region so as to expose the insulating layer;
• and
• forming a passivation layer to cover the source electrode, the drain electrode, the channel, and the non-TFT region.

A method for forming a thin film transistor liquid crystal display (TFT-LCD), the TFT-LCD including at least one thin film transistor (TFT) and one storage capacitor (Cs), the method comprising the steps of:

• providing a substrate;
• depositing a first and a second conductive layer on the substrate to form a gate electrode of the TFT and a bottom electrode of the storage capacitor and;
• forming an insulating layer above the conductive layers and the substrate;
• sequentially forming a semiconductor layer and a doped silicon layer on the insulating layer;
• depositing a sacrifice layer with an island shape above the doped silicon layer, and the sacrifice layer being positioned directly above the first conductive layer;
• forming a metal layer covering the sacrifice layer and the doped silicon layer;
• patterning the metal layer to form a source electrode and a drain electrode above the first conductive layer, a channel being defined between the source electrode and the drain electrode to expose the sacrifice layer therein, and a non-TFT region being defined as a portion of the substrate not covered by the source electrode, the drain electrode, and the channel so as to expose the doped silicon layer thereon;
• using the source and the drain electrodes as a mask to perform the following etching processes at the same time (a) to remove the island-shaped sacrifice layer and the doped silicon layer in the channel, as well as (b) to remove the doped silicon layer and the semiconductor layer in the non-TFT region, so that the semiconductor layer being exposed in the channel and the insulating layer being exposed in the non-TFT region;
• and
• forming a passivation layer to cover the source electrode, the drain electrode, the channel, and the second conductive layer.

A method for manufacturing a thin film transistor liquid crystal display (TFT-LCD), the TFT-LCD having at least one thin film transistor (TFT) and one storage capacitor (Cs), the method comprising the steps of:

• providing a substrate;
• depositing a first and a second conductive layer above the substrate to form a gate electrode of the TFT and a bottom electrode of the storage capacitor, respectively;
• forming an insulating layer above the conductive layers and the substrate;
• depositing a semiconductor layer on the insulating layer;
• forming a sacrifice layer with an island shape on the semiconductor layer, and the sacrifice layer being positioned directly above the first conductive layer;
• depositing a doped silicon layer on the island-shaped sacrifice layer and the semiconductor layer;
• forming a metal layer covering the doped silicon layer and the island-shaped sacrifice layer;
• patterning the metal layer to form a source electrode and a drain electrode above the first conductive layer, a channel being defined between the source electrode and the drain electrode to expose the doped silicon layer therein, and a non-FT region being defined as a portion of the substrate not covered by the source electrode, the drain electrode, and the channel to expose the doped silicon layer thereon;
• using the source and the drain electrodes as a mask to perform the following etching processes at the same time to (a) remove the doped silicon layer and the island-shaped sacrifice layer in the channel so as to expose the semiconductor layer in the channel, and (b) to remove the doped silicon layer and the semiconductor layer in the non-TFT region so as to expose the insulating layer;
• and
• forming a passivation layer to cover the source electrode, the drain electrode, the channel, and the second conductive layer.

A method of manufacturing a thin film transistor (TFT), comprising the steps of:

• providing a substrate;
• depositing a conductive lay r adjacent the substrate to form a gate electrode of the thin film transistor;
• forming an insulating layer adjacent the conductive layer;
• forming a semiconductor layer on the insulating layer;
• depositing a sacrificial layer ith an island shape and a doped silicon layer on the semiconductor layer;
• forming a metal layer covering the sacrificial layer and the doped silicon layer;
• patterning the metal layer t form a source electrode and a drain electrode, a channel being defined between the source electrode and the drain electrode, a non-TFT region being defined as a portion of the substrate not covered by the source electrode, the drain electrode, and the channel, and the island-shaped sacrificial layer being exposed in the channel and the doped silicon layer being exposed in the non-TFT region after the metal layer being patterned;
• using the source and the rain electrodes as a mask to perform the following etching processes:
• (a) removing the island-shaped sacrifice layer in the channel so that the semiconductor layer being exposed in the channel;
• and
• (b) removing the semiconductor layer in the non-TFT region to expose the insulating layer;
• and
• forming a passivation layer to cover the source electrode, the drain electrode, the channel, an the substrate.