Method for fabricating a source line of a flash memory cell

A method for fabricating a source line of a flash memory cell, comprising the steps of:

• providing a substrate covered by a silicon oxide layer, a first polysilicon layer, and a silicon nitride layer successively;
• patterning, the silicon nitride layer to form an opening having a lower and upper part over the substrate and expose the first polysilicon layer;
• forming a first spacer over the sidewall of the lower part of the opening;
• forming a second spacer over the sidewall of the upper part of the opening and the first spacer;
• removing the exposed first polysilicon layer under the opening;
• forming a third spacer over the sidewall of the first spacer and the second spacer;
• filling the opening with a second polysilicon layer;
• removing the silicon nitride layer and the underlying first polysilicon layer and the underlying silicon oxide layer to form a floating gate composed of the remaining first polysilicon layer under the first spacer;
• and
• forming a control gate over the sidewall of the floating gate and insulated from the substrate and the floating gate.