Process for manufacturing a semiconductor memory device including a memory cell selecting transistor and a capacitor with metal electrodes
AssigneeHitachi, Ltd.
InventorsShinpei Iijima, Satoshi Yamamoto
Life of this patent
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Abstract
A technique is provided which is capable of forming a Ru film constituting a lower electrode of an information storing capacitive element in an aperture with high precision. After a Ru film is deposited, heat treatment is performed in a reducing atmosphere on a side wall and a bottom portion of a deep aperture in which the information storing capacitive element is formed. The deposition and heating of Ru films can be repeated to form a laminated structure of Ru films. As a result, it is possible to effectively remove impurities included in the Ru film, and to achieve fineness of the Ru film.
Claims17
A process for manufacturing a semiconductor integrated circuit device, comprising the steps of:
- (a) forming a memory cell selecting MISFET over a major surface of a semiconductor substrate;
- (b) forming a plug electrically connected to a source and drain region of said memory cell selecting MISFET;
- (c) forming a silicon oxide film on said plug;
- (d) forming an aperture, in said silicon oxide film, arriving at a surface of said plug;
- (e) depositing a Ru film on a side wall and a bottom portion of said aperture and performing a heat treatment in a reducing atmosphere;
- (f) forming a capacitive insulating film over said Ru film;
- and
- (g) forming an upper electrode on said capacitive insulating film.
A process for manufacturing a semiconductor integrated circuit device, comprising the steps of:
- (a) forming a memory cell selecting MISFET over a major surface of a semiconductor substrate;
- (b) forming a plug electrically connected to a source and drain region of said memory cell selecting MISFET;
- (c) forming a silicon oxide film on said plug;
- (d) forming an aperture, in said silicon oxide film, arriving at a surface of said plug;
- (e) making an organic compound of Ru react with an oxidizer and thereby forming a Ru film on a side wall and a bottom portion of said aperture;
- (f) heat-treating said Ru film in reducing atmosphere;
- (g) forming a capacitive insulating film over said Ru film;
- and
- (h) forming an upper electrode over said capacitive insulating film.
A process for manufacturing a semiconductor integrated circuit device, comprising the steps of:
- (a) forming a memory cell selecting MISFET over a major surface of a semiconductor substrate;
- (b) forming a plug electrically connected to a source and drain region of said memory cell selecting MISFET;
- (c) forming a silicon oxide film on said plug;
- (d) forming an aperture, in said silicon oxide film, arriving at a surface of said plug;
- (e) making an organic compound of Ru react with an oxidizer and thereby forming a Ru film on a side wall and a bottom portion of said aperture;
- (f) performing first heat treatment in reducing atmosphere and second heat treatment in non-oxidizing atmosphere at said Ru film;
- (g) forming a capacitive insulating film over said Ru film;
- and
- (h) forming an upper electrode over said capacitive insulating film.
A process for manufacturing a semiconductor integrated circuit device, comprising the steps of:
- (a) forming an inter-layer insulating film over a semiconductor substrate;
- (b) forming an aperture in said inter-layer insulating film;
- (c) forming a first conductive film on a side wall and a bottom portion of said aperture and performing a heat treatment in a reducing atmosphere;
- (d) forming an insulating film over said first conductive film;
- and
- (e) forming a second conductive film over said insulating film.
A process for manufacturing a semiconductor integrated circuit device, comprising the steps of:
- (a) forming a memory cell selecting MISFET over a major surface of a semiconductor substrate;
- (b) forming a plug electrically connected to a source and drain region of said memory cell selecting MISFET;
- (c) forming a silicon oxide film on said plug;
- (d) forming an aperture, in said silicon oxide film, arriving at a surface of said plug;
- (e) depositing a Ru film on a side wall and a bottom portion of said aperture;
- (f) removing impurities of the Ru film by heat treating the Ru film in a reducing atmosphere;
- (g) forming a capacitive insulating film over said Ru film;
- and
- (h) forming an upper electrode on said capacitive insulating film.
Dependencies are inferred from the claim text.