Method for manufacturing semiconductor device with hetero junction bipolar transistor

A method for manufacturing a semiconductor device,

• wherein respective semiconductor layers which are formed into a sub collector layer, a collector layer, a mesa-shaped base layer, a wide gap emitter layer and an emitter layer are sequentially formed over one surface of a semiconductor substrate,
• wherein an isolation which establishes an electric insulation is formed between a region in which a hetero junction bipolar transistor is formed and other elements,
• wherein, in the region in which the hetero junction bipolar transistor is formed, among the respective semiconductor layers, the given semiconductor layers are formed in given patterns by sequential etching thus sequentially forming an emitter layer, a wide gap emitter layer, the mesa-shaped base layer, the collector layer and the sub collector layer,
• wherein an emitter electrode is formed over the emitter layer,
• wherein an alloying treatment is applied to the wide gap emitter layer which extends around the emitter layer to form a base electrode which is electrically connected to the base layer, and
• wherein a collector electrode is formed over a collector layer which extends around the base layer so as to manufacture the hetero junction bipolar transistor, and
• wherein the mesa-shaped base layer is formed after forming the base electrode.

A method for manufacturing a semiconductor device in which a plurality of semiconductor layers are sequentially formed over a semiconductor substrate in a laminating manner, a hetero junction bipolar transistor, a Schottky diode and a resistance element are formed in a monolithic manner, and an isolation for establishing an electric insulation is provided at least between the hetero junction bipolar transistor and the Schottky diode,

• wherein respective semiconductor layers which are formed into a sub collector layer, a collector layer, a base layer, a wide gap emitter layer and an emitter layer are sequentially formed over one surface of the semiconductor substrate, and thereafter, in the manufacture of the hetero junction bipolar transistor, among the respective semiconductor layers, the given semiconductor layers are formed in given patterns by sequential etching thus sequentially forming an emitter layer, a wide gap emitter layer, the base layer, the collector layer and the sub collector layer, and at the same time, an emitter electrode is formed over the emitter layer, an alloying treatment is applied to the wide gap emitter layer which extends around the emitter layer thus forming a base electrode which is electrically connected to the base layer, and a collector electrode is formed over the collector layer which extends around the base layer thus forming the hetero junction bipolar transistor,
• wherein, in the manufacture of the Schottky diode, a Schottky electrode is formed over a semiconductor layer corresponding to the collector layer, and an ohmic electrode for diode is formed over a semiconductor layer corresponding to the sub collector layer thus forming the Schottky diode,
• wherein, in the manufacture of the resistance element, a resistance film is formed over an insulation film in a region outside a region where the hetero junction bipolar transistor and the Schottky diode are formed thus forming the resistance element, and
• wherein the emitter electrode and the resistance film are simultaneously formed using a same material.

A method for manufacturing a semiconductor device in which a plurality of semiconductor layers are sequentially formed over a semiconductor substrate in a laminating manner, a hetero junction bipolar transistor, a Schottky diode and a resistance element are formed in a monolithic manner, and an isolation for establishing an electric insulation is provided at least between the hetero junction bipolar transistor and the Schottky diode,

• wherein respective semiconductor layers which are formed into a sub collector layer, a collector layer, a base layer, a wide gap emitter layer and an emitter layer are sequentially formed over one surface of the semiconductor substrate, and thereafter, in the manufacture of the hetero junction bipolar transistor, among the respective semiconductor layers, the given semiconductor layers are formed in given patterns by sequential etching thus sequentially forming an emitter layer, a wide gap emitter layer, the base layer, the collector layer and the sub collector layer, and at the same time, an emitter electrode is formed over the emitter layer, an alloying treatment is applied to the wide gap emitter layer which extends around the emitter layer thus forming a base electrode which is electrically connected to the base layer, and a collector electrode is formed over the collector layer which extends around the base layer thus forming the hetero junction bipolar transistor,
• wherein, in the manufacture of the Schottky diode, a Schottky electrode is formed over a semiconductor layer corresponding to the collector layer, and an ohmic electrode for diode is formed over a semiconductor layer corresponding to the sub collector layer thus forming the Schottky diode,
• wherein, in the manufacture of the resistance element, a resistance film is formed over an insulation film in a region outside a region where the hetero junction bipolar transistor and the Schottky diode are formed thus forming the resistance element, and
• wherein the emitter electrode, the Schottky electrode and the resistance film are simultaneously formed using a same material.

A method for manufacturing a semiconductor device comprising

• a semiconductor substrate,
• a plurality of semiconductor layers which are sequentially formed in an overlapped manner on one surface of the semiconductor substrate, and
• a plurality of circuit elements which are formed over the semiconductor substrate and the semiconductor layers,
• wherein one or the plurality of circuit elements are formed electrically independently from each other by being surrounded by a separation groove which reaches a surface layer of the semiconductor substrate from the semiconductor layer, and the given circuits elements are electrically connected to each other by lines which extend and traverse the separation groove, and
• the method comprising the steps of:
• forming, between the semiconductor substrate and the semiconductor layer which is formed as a layer above the semiconductor substrate, an etching stopper layer which is formed of a material having an etching speed lower than an etching speed of the semiconductor layer which is formed as a layer above the semiconductor substrate, and
• forming the separation groove by including an etching treatment in which etching of the semiconductor layer which is formed as a layer above the etching stopper layer is stopped at the etching stopper layer, an etching treatment in which the etching stopper layer is etched, and an etching treatment in which a surface layer portion of the semiconductor substrate is etched.