Electronics testing circuit and method
AssigneeTexas Instruments Incorporated
InventorHarland Glenn Hopkins
Life of this patent
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Abstract
An electronics testing circuit comprises a tested circuit (12) which includes testing cells (30,32) and a first transceiver (54) coupled to the cells (30,32). The first transceiver (54) is operable to transmit signals received from the testing cells (30,32) and to receive signals transmitted for the cells (30,32). A second transceiver (26) is operable to receive signals from the first transceiver (54) and send signals to the first transceiver (54). A testing device (18) is coupled to the second transceiver (26) and is operable to send signals to it for the testing cells (30,32) and receive signals from the testing cells (30,32).
Claims15
An electronics testing circuit, comprising:
- a tested circuit including testing cells and a first transceiver coupled to the cells, the first transceiver operable to transmit signals received from the testing cells and to receive signals transmitted for the cells;
- a second transceiver operable to receive signals from the first transceiver and send signals to the first transceiver;
- a testing device coupled to said second transceiver and operable to send signals to the second transceiver for the testing cells and receive signals from the testing cells;
- a translation circuit coupled between the testing circuit and the second transceiver, the translation circuit including a multiplexer, and wherein
- the signals sent from the testing device are multiple and the multiplexer is operable to generate a single signal from the multiple signals, and
- the tested circuit includes a demultiplexer operable to generate the multiple signals sent from the testing device from the single signal.
An electronics testing circuit, comprising:
- a tested circuit including input pins, output pins, testing cells and a first transceiver coupled to the cells, the first transceiver operable to transmit signals received from the testing cells and to receive signals transmitted for the cells, each pin corresponding to at least one testing cell;
- a second transceiver operable to receive signals from the first transceiver and send signals to the first transceiver;
- a testing device coupled to said second transceiver and operable to send signals representing emulation inputs to the second transceiver for the testing cells and receive signals from the testing cells;
- a first modulator coupled to the second transceiver and the testing device, and operable to generate a first modulated signal from signals received from the testing device;
- and
- a first demodulator;
- the tested circuit further includes a second modulator and a second demodulator, the second modulator operable to generate a second modulated signal from signals received from the testing cells, the second demodulator operable to generate a first demodulated signal from the first modulated signal, and
- the first demodulator is operable to generate a second demodulated signal from the second modulated signal, and
- the first and second transceivers transmit and receive signals in modulated form.
An electronics testing circuit, comprising:
- a tested circuit including input pins, output pins, testing cells and a first transceiver coupled to the cells, the first transceiver operable to transmit signals received from the testing cells and to receive signals transmitted for the cells, each pin corresponding to at least one testing cell, the testing cells being coupled together and operable to function as a shift register;
- a second transceiver operable to receive signals from the first transceiver and send signals to the first transceiver;
- a testing device coupled to said second transceiver and operable to send signals to the second transceiver for the testing cells and receive signals from the testing cells;
- a first modulator coupled to the second transceiver and the testing device, and operable to generate a first modulated signal from signals received from the testing device;
- and
- a first demodulator;
- the tested circuit further includes a second modulator and a second demodulator, the second modulator operable to generate a second modulated signal from signals received from the testing cells, the second demodulator operable to generate a first demodulated signal from the first modulated signal, and
- the first demodulator is operable to generate a second demodulated signal from the second modulated signal, and
- the first and second transceivers transmit and receive signals in modulated form.
A method of testing a circuit, comprising the steps of:
- generating testing cell signals;
- electromagnetically transmitting the testing cell signals from the circuit to a transceiver;
- transmitting the testing cell signals from the transceiver to a testing device;
- transmitting testing device signals from the testing device to a transceiver;
- electromagnetically transmitting the testing device signals to the circuit;
- and
- controlling the testing cells in response to the testing device signals.
Dependencies are inferred from the claim text.