Compare branch instruction pairing within a single integer pipeline

An apparatus in a single pipeline microprocessor for executing a compare-and-branch operation, the apparatus comprising:

• a jump combiner, for pairing a compare instruction and a conditional jump instruction into a compare/branch micro instruction, said compare/branch micro instruction prescribing a comparison task and a conditional branch task;
• compare execution logic, coupled to said jump combiner, for receiving said compare/branch micro instruction, for performing said comparison task, for generating a result of said comparison task, and for updating bits in a flags register to describe said result;
• and
• jump resolution logic, coupled to said compare execution logic, for evaluating one or more of said bits to resolve said conditional branch task.

An apparatus for executing a macro instruction sequence that directs a microprocessor to compare two register operands, to update a flags register to describe a comparison result, to evaluate the flags register to determine if the comparison result satisfies a prescribed condition, and to transfer program control to a branch target address if the prescribed condition is satisfied, the apparatus comprising:

• translation logic, configured to decode the macro instruction sequence into a compare-and-branch micro instruction, said compare-and-branch micro instruction comprising:
• two operand fields, specifying the two register operands;
• an opcode field, specifying the prescribed condition, and directing execute logic to compare the two register operands to generate the comparison result;
• and
• an immediate field, specifying the branch target address;
• and
• condition evaluation logic, coupled to said translation logic, for evaluating the flags register.

A method for performing a compare-and-branch operation in a pipeline microprocessor, comprising:

• translating a compare macro instruction and a conditional jump macro instruction into a single compare-and-jump micro instruction;
• performing a compare operation prescribed by the single compare-and-jump micro instruction to produce a result;
• and
• evaluating the result in accordance with a condition prescribed by the single compare-and-jump micro instruction to indicate whether or not a branch is to be taken.