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US 6,647,478 B2Granted
Semiconductor memory device
AssigneeKabushiki Kaisha Toshiba
InventorsKenji Tsuchida, Haruki Toda, Hitoshi Kuyama
Life of this patent
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Abstract
A semiconductor memory device. The device includes a bit line, a memory cell coupled to the bit line and a word line coupled to the memory cell. A first time between the receiving of a read command for a read operation in order to read data from the memory cell and the beginning of the read operation is different from a second time between the receiving of a write command for a write operation in order to write data to the memory cell and the beginning of the write operation.
Claims11
A semiconductor memory device comprising:
- a bit line;
- a memory cell coupled to the bit line;
- and
- a word line coupled to the memory cell,
- wherein a first time between receiving a read command for a read operation in order to read data from the memory cell and beginning the read operation is different from a second time between receiving a write command for a write operation in order to write data to the memory cell and beginning the write operation.
2 more elements
Dependencies are inferred from the claim text.