US 6,647,463 B2 · Cache update method and cache update control system employing non-blocking type cache

Abstract

If a cache miss occurs at a time of a load request from a processor core, an issuance check block issues a request of reading out data caused by the cache miss, to a main memory from an issuance control circuit, and then registers the information of the request in a request buffer circuit. A cache block does not update an address array at that time, and it is processed as a cache hit if a following instruction is hit to an address stored in an entry of an update schedule. The update of the address array is done simultaneously with the update of a data array when responsive data is received from the main memory with regard to said request. Accordingly, it is possible to provide a new cache update method, in which the feature of a cache of a non-blocking type can be sufficiently used, such as the merit of continuing a process for a following instruction even while the request of reading out the data caused by the cache miss is sent to the main memory.

Claims17

Dependent claims

A cache update control system employing a non-blocking type cache, comprising:

a main memory which stores main memory data;
a data array which stores a data block comprising part of the main memory data stored in said main memory;
an address array which stores an address corresponding to said data block stored in said data array;
a hit judgment circuit which judges, in response to a load request issued from a processor core, whether or not a miss occurs;
and
a control unit which issues a read request to said main memory when said hit judgment circuit judges an occurrence of the miss, and updates said address array and said data array after receiving the main memory data read from said main memory,
wherein a following load request is processed and unaffected by said non-blocking type cache while said control unit waits for a response from said main memory after issuing said read request.

4 more elements

Dependencies are inferred from the claim text.

Cache update method and cache update control system employing non-blocking type cache

Life of this patent

Cache update method and cache update control system employing non-blocking type cache

Life of this patent

Abstract

Claims17