Emulation system scaling

An apparatus comprising

• (a) a first plurality of interconnect boards, and a second plurality of interconnect boards orthogonally coupled to the first plurality of interconnect boards, wherein each of the second plurality of interconnect boards further includes a first plurality of expansion connectors;
• (b) a third plurality of interconnect boards, and a fourth plurality of interconnect boards orthogonally coupled to the third plurality of interconnect boards and correspondingly coupled to the second plurality of interconnect boards through selected ones of the first plurality of expansion connectors of each of the second plurality of interconnect boards, each of the fourth plurality of interconnect boards also having a second plurality of expansion connectors;
• and
• (c) a first plurality of flex printed circuit boards (PCBs) correspondingly coupling selected ones of the first plurality of expansion connectors of each of the second plurality of interconnect boards to selected ones of the second plurality of expansion connectors of each of the fourth plurality of interconnect boards.

A scalable emulation system comprising

• a first plurality of logic boards, wherein each logic board includes a first plurality of logic chips reconfigurable to emulate a first plurality of circuit elements of a circuit design, and an intraboard interconnect network to interconnect logic chips within a given logic board;
• a first plurality of interconnect boards correspondingly coupled to the first plurality of logic boards, wherein each of the first plurality of interconnect boards includes a first plurality of interconnect chips;
• a second plurality of interconnect boards orthogonally coupled to the first plurality of interconnect boards, wherein each of the second plurality of interconnect boards includes a second plurality interconnect chips, and wherein the first and second plurality of interconnect chips of each of the first and second plurality of interconnect boards are reconfigurable to selectively interconnect the logic chips of different ones of the first plurality of logic boards at a logic-board level;
• and
• a first plurality of expansion slots on the second plurality of interconnect boards for facilitating expansion of the emulation system in one or more selected ones of expansion orientations.

A scalable emulation system comprising

• a first plurality of logic boards, wherein each of the first plurality of logic boards includes a first plurality of logic chips and an intraboard interconnect network to interconnect logic chips within a given logic board, said first plurality of logic chips reconfigurable to emulate a first plurality of circuit elements of a circuit design;
• a first plurality of interconnect boards correspondingly coupled to the first plurality of logic boards;
• a second plurality of interconnect boards orthogonally coupled to the first plurality of interconnect boards, wherein each of the second plurality of interconnect boards further includes a first plurality of expansion slots;
• a second plurality of logic boards, wherein each of the second plurality of logic boards includes a second plurality of logic chips and an intraboard interconnect network to interconnect logic chips within a given logic board, said second plurality of logic chips reconfigurable to emulate a first plurality of circuit elements of a circuit design;
• a third plurality of interconnect boards corresponding coupled to the second plurality of logic boards;
• and
• a fourth plurality of interconnect boards orthogonally coupled to the third plurality of interconnect boards and correspondingly coupled to the second plurality of interconnect boards through selected ones of the first plurality of expansion slots of each of the second plurality of interconnect boards, wherein the first, second, third, and fourth plurality of interconnect boards are reconfigurable to selectively interconnect the logic chips of different ones of the first and second plurality of logic boards at a logic-board level.

An interconnect network for an emulation system comprising:

• a first plurality of interconnect boards;
• a second plurality of interconnect boards orthogonally coupled to the first plurality of interconnect boards, wherein each of the second plurality of interconnect boards further includes a first plurality of expansion slots;
• a third plurality of interconnect boards;
• a fourth plurality of interconnect boards orthogonally coupled to the third plurality of interconnect boards and correspondingly coupled to the second plurality of interconnect boards through selected ones of the first plurality of expansion slots of each of the second plurality of interconnect boards, each of the fourth plurality of interconnect boards also having a second plurality of expansion slots;
• and
• a first plurality of flex printed circuit boards (PCBS) correspondingly coupling selected ones of the first plurality of expansion slots of each of the second plurality of interconnect boards to selected ones of the second plurality of expansion slots of each of the fourth plurality of interconnect boards, wherein the first, second, third, and fourth plurality of interconnect boards are reconfigurable to selectively interconnect logic boards at a logic-board level.