Method and apparatus for automated generation of test semiconductor wafers
AssigneeAdvanced Micro Devices, Inc.
InventorChristopher A. Bone
Life of this patent
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Abstract
The present invention provides for a method and an apparatus for automated generation of test semiconductor wafers. At least one process run of semiconductor devices is performed. A determination is made whether an excursion of the process exists. An automated test wafer generation process is performed in response to the determination that an excursion of the process exists. A control parameter modification sequence is implemented in response to an examination of the test wafers.
Claims25
A method, comprising:
- performing at least one process run of semiconductor devices;
- determining whether an excursion of said process exists;
- performing an automated test wafer generation process in response to said determination that an excursion of said process exists;
- and
- implementing a control parameter modification sequence for processing a subsequent run of semiconductor devices in response to an examination of said test wafers.
A system, comprising:
- a processing tool capable of performing a process on a first semiconductor wafer;
- and
- a controller operatively coupled to said processing tool, said controller being capable of determining whether an excursion of said process exists, performing an automated test wafer generation process in response to said determination that an excursion of said process exists, and modifying a control parameter for processing a second semiconductor wafer in response to an examination of said test wafers.
An apparatus, comprising:
- means for performing at least one process run of semiconductor devices;
- means for determining whether an excursion of said process exists;
- means for performing an automated test wafer generation process in response to said determination that an excursion of said process exists;
- and
- means for implementing a control parameter modification sequence for processing a subsequent run of semiconductor devices in response to an examination of said test wafers.
A computer readable program storage device encoded with instructions that, when executed by a computer, performs a method, comprising:
- performing at least one process run of semiconductor devices;
- determining whether an excursion of said process exists;
- performing an automated test wafer generation process in response to said determination that an excursion of said process exists;
- and
- implementing a control parameter modification sequence for processing a subsequent run of semiconductor devices in response to an examination of said test wafers.
Dependencies are inferred from the claim text.