ADPCM encoding apparatus, ADPCM decoding apparatus and delay circuit

The ADPCM encoding apparatus configured to compress a differential signal between an input digital signal and a predicted value of said input digital signal by encoding said differential signal in accordance with adaptive differential pulse code modulation, said ADPCM encoding apparatus comprising:

• a prediction unit configured to output said predicted value;
• a subtractor configured to output said differential signal between said predicted value outputted from said prediction unit and said input digital signal;
• an adaptive quantizer unit configured to quantize said differential signal outputted from said subtractor with a quantization step and outputting said quantized differential signal;
• a quantization step adjustment unit configured to update said quantization step in accordance with said differential signal having been quantized by said adaptive quantizer unit;
• and
• an inverse quantizer connected to said adaptive quantizer unit and said quantization step adjustment unit configured to inversely quantize said quantized differential signal outputted from said adaptive quantizer unit with said quantization step to output a decoded quantized differential signal,
• said prediction unit being connected to said inverse quantizer and outputting a next value of said predicted value with reference to a reappeared quantized differential signal,
• wherein said prediction unit is implemented with a plurality of algorithms configured to calculate said predicted value and performs the prediction in accordance with one of said algorithms which is selected by referring to said differential signal having been outputted from said adaptive quantizer unit;
• and
• wherein said prediction unit comprises:
• a first adder configured to add, at time k, a differential signal d″(k−1) of one cycle before to an output signal p″(k−1) of one cycle before of said prediction unit and correcting said predicted value as p1(k)=p″(k−1)+d″(k−1);
• a first register configured to store said corrected predicted value of one cycle before;
• a second register configured to store a corrected predicted value of two cycles before;
• a multiplier configured to double the content of said first register and to output the product;
• a second adder configured to add the content of said second register to said product of said multiplier;
• a selector having an input terminal IN1 configured to receive an output of said second adder and an input terminal INO configured to receive said content of said first register;
• and
• a comparator configured to compare an encoded value q(k−1) of one cycle before with “0111” and “1000”, to output “1” to an S terminal of said selector if said encoded value q(k−1) is equal to one of “0111” and “1000”, and to output “0” to said S terminal if said encoded value q(k−1) is equal to neither of “0111” and “1000”, so that said selector may select and output a signal of 2p″(K−1)−p″(K−2) inputted to said terminal IN1 if “1” is inputted to said S terminal, and if “0” is inputted to said S terminal, a signal of p″(K−1) inputted to said terminal INO.

An ADPCM decoding apparatus configured to receive a quantized differential signal inputted, to inversely quantize said quantized differential signal in accordance with adaptive differential pulse code modulation and to output a decoded output digital signal, said ADPCM decoding apparatus comprising:

• an inverse quantizer configured to receive and to inversely quantize said quantized differential signal inputted with a quantization step to output a reappeared quantized differential signal;
• a quantization step adjustment unit connected to said inverse quantizer configured to update said quantization step in accordance with said quantized differential signal as inputted;
• a prediction unit configured to receive said quantized differential signal inputted, and to calculate and to output a predicted value of said decoded output digital signal;
• an adder connected to said inverse quantizer and said prediction unit configured to calculate the sum of outputs of said inverse quantizer and said prediction unit,
• wherein said prediction unit is implemented with a plurality of algorithms configured to calculate said predicted value and performs the prediction in accordance with one of said algorithms which is selected by referring to said quantized differential signal as inputted.

An ADPCM encoding and decoding apparatus comprising:

• an ADPCM encoding apparatus configured to compress a differential signal between an input digital signal and a predicted value of said digitized input by encoding said differential signal in accordance with adaptive differential pulse code modulation;
• an ADPCM decoding apparatus configured to receive a quantized differential signal inputted, to inversely quantize said quantized differential signal in accordance with adaptive differential pulse code modulation and to output a decoded output digital signal;
• and
• a memory device connected between said ADPCM encoding apparatus and said ADPCM decoding apparatus configured to temporarily store an encoded signal;
• said ADPCM encoding apparatus comprising:
• a first prediction unit configured to output said predicted value;
• a subtractor configured to output said differential signal between said predicted value outputted from said prediction unit and said input digital signal;
• a first adaptive quantizer unit configured to quantize said differential signal outputted from said subtractor with a quantization step and to output said quantized differential signal;
• a first quantization step adjustment unit configured to update said quantization step in accordance with said differential signal having been quantized by said adaptive quantizer unit;
• and
• a first inverse quantizer connected to said first adaptive quantizer unit and said first quantization step adjustment unit configured to inversely quantize said quantized differential signal outputted from said adaptive quantizer unit with said quantization step to output a decoded quantized differential signal, said prediction unit being connected to said inverse quantizer and outputting a next value of said predicted value with reference to a reappeared quantized differential signal,
• wherein said first prediction unit is implemented with a plurality of algorithms configured to calculate predicted values and performs the prediction in accordance with one of said algorithms which is selected by referring to said differential signal having been outputted from said first adaptive quantizer unit;
• said ADPCM decoding apparatus comprising:
• a second inverse quantizer configured to receive and to inversely quantize said quantized differential signal as inputted with a quantization step to output a reappeared quantized differential signal;
• a second quantization step adjustment unit connected to said second inverse quantizer configured to update said quantization step in accordance with said quantized differential signal inputted;
• a second prediction unit configured to receive said quantized differential signal as inputted, and to calculate and to output a predicted value of said decoded output digital signal;
• an adder connected to said second inverse quantizer and said second prediction unit configured to calculate the sum of outputs of said second inverse quantizer and said second prediction unit,
• wherein said second prediction unit is implemented with a plurality of algorithms configured to calculate predicted values and performs the prediction in accordance with one of said algorithms which is selected by referring to said quantized differential signal as inputted.

A signal delay circuit comprising:

• an ADPCM encoding apparatus configured to compress a digitized signal into an encoded signal by quantizing said digitized signal in accordance with adaptive differential pulse code modulation;
• a first memory device connected to said ADPCM encoding apparatus and configured to temporarily store a first internal variable used in said ADPCM encoding apparatus;
• an ADPCM decoding apparatus connected to said memory device configured to expand said encoded signal into said digitized signal by inversely quantizing said encoded signal;
• a second memory device connected to said ADPCM decoding apparatus configured to temporarily store a second internal variable used in said ADPCM decoding apparatus;
• a control device connected to said ADPCM encoding apparatus and said ADPCM decoding apparatus configured to maintain agreement of said first and second internal variables of said ADPCM encoding apparatus and said ADPCM decoding apparatus;
• an analog-digital converter connected to said ADPCM encoding apparatus configured to receive and to convert an analog input signal into said digitized signal;
• and
• a digital-analog converter connected to said ADPCM decoding apparatus configured to convert said digitized signal into an analog output signal;
• wherein said analog input signal is a voice signal, and said signal delay circuit is implemented in an echo generation system for a “Karaoke” sing-along system;
• and
• wherein said control device is operated to store said first internal variable of said ADPCM encoding apparatus and transfer a content of said first memory device to said ADPCM decoding apparatus with a time interval of delay time of an echo effect of said echo generation system.