Semiconductor circuit and semiconductor device
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsTakashi Tatsumi, Junji Mori, Hiroki Sugano
Life of this patent
Estimating the term…
Abstract
The semiconductor circuit includes a driver that is input with a signal, a driver that is input with a signal, and a driver of which input terminal is connected to output terminals of both the drivers, and of which output terminal is connected to input terminals of both the drivers.
Claims16
A semiconductor circuit comprising a buffer circuit and an input/output circuit,
- said buffer circuit having
- a first controller that is input with a first signal that becomes enable at the time of outputting data and becomes disable at the time of inputting data, and a second signal that is changed over in a test mode, and that outputs a third signal;
- and
- a second controller that is input with the first signal and an inverted signal of the second signal, and that outputs a fourth signal, and
- said input/output circuit having
- a first driver that is input with the third signal;
- a second driver that is input with the fourth signal;
- and
- a third driver of which input terminal is connected to output terminals of said first driver and said second driver, and of which output terminal is connected to input terminals of said first driver and said second driver.
A semiconductor circuit comprising a buffer circuit and an input/output circuit,
- said buffer circuit having
- a first controller that is input with a first signal that becomes enable at the time of outputting data and becomes disable at the time of inputting data, and a second signal that is changed over in a test mode, and that outputs a third signal;
- and
- a second controller that is input with the first signal, and that outputs a fourth signal, and
- said input/output circuit having
- a first driver that is input with the third signal;
- a second driver that is input with the fourth signal;
- and
- a third driver of which input terminal is connected to output terminals of said first driver and said second driver, and of which output terminal is connected to input terminals of said first driver and said second driver.
A semiconductor device comprising:
- a semiconductor circuit formed with a logic circuit and a semiconductor circuit formed with a memory electrically connected to each other, wherein one or both of said semiconductor circuits having a buffer circuit and an input/output circuit,
- said buffer circuit having
- a first controller that is input with a first signal that becomes enable at the time of outputting data and becomes disable at the time of inputting data, and a second signal that is changed over in a test mode, and that outputs a third signal;
- and
- a second controller that is input with the first signal and an inverted signal of the second signal, and that outputs a fourth signal, and
- said input/output circuit having
- a first driver that is input with the third signal;
- a second driver that is input with the fourth signal;
- and
- a third driver of which input terminal is connected to output terminals of said first driver and said second driver, and of which output terminal is connected to input terminals of said first driver and said second driver.
A semiconductor device comprising:
- a semiconductor circuit formed with a logic circuit and a semiconductor circuit formed with a memory electrically connected to each other, wherein one or both of said semiconductor circuits having a buffer circuit and an input/output circuit,
- said buffer circuit having
- a first controller that is input with a first signal that becomes enable at the time of outputting data and becomes disable at the time of inputting data, and a second signal that is changed over in a test mode, and that outputs a third signal;
- and
- a second controller that is input with the first signal, and that outputs a fourth signal, and
- said input/output circuit having
- a first driver that is input with the third signal;
- a second driver that is input with the fourth signal;
- and
- a third driver of which input terminal is connected to output terminals of said first driver and said second driver, and of which output terminal is connected to input terminals of said first driver and said second driver.
A semiconductor device comprising a plurality of semiconductor circuits electrically connected to each other, wherein each one of said semiconductor circuits having a buffer circuit and an input/output circuit,
- said buffer circuit having
- a first controller that is input with a first signal that becomes enable at the time of outputting data and becomes disable at the time of inputting data, and a second signal that is changed over in a test mode, and that outputs a third signal;
- and
- a second controller that is input with the first signal and an inverted signal of the second signal, and that outputs a fourth signal, and
- said input/output circuit having
- a first driver that is input with the third signal;
- a second driver that is input with the fourth signal;
- and
- a third driver of which input terminal is connected to output terminals of said first driver and said second driver, and of which output terminal is connected to input terminals of said first driver and said second driver.
A semiconductor device comprising a plurality of semiconductor circuits electrically connected to each other, wherein each one of said semiconductor circuits having a buffer circuit and an input/output circuit,
- said buffer circuit having
- a first controller that is input with a first signal that becomes enable at the time of outputting data and becomes disable at the time of inputting data, and a second signal that is changed over in a test mode, and that outputs a third signal;
- and
- a second controller that is input with the first signal, and that outputs a fourth signal, and
- said input/output circuit having
- a first driver that is input with the third signal;
- a second driver that is input with the fourth signal;
- and
- a third driver of which input terminal is connected to output terminals of said first driver and said second driver, and of which output terminal is connected to input terminals of said first driver and said second driver.
Dependencies are inferred from the claim text.