US 6,646,944 B2Granted

Semiconductor memory device

AssigneeMitsubishi Denki Kabushiki Kaisha

InventorsHiroki Shimano, Katsumi Dosaka

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Abstract

In a memory sub-block, a refresh activation instruction signal from a main control circuit is taken in by a de-multiplexer in a local control circuit under a predetermined condition and refreshing is executed in the memory sub-block. The de-multiplexer is inhibited from taking in this refresh activation instruction signal when an adjacent memory sub-block is in an inactivated state with the corresponding memory block being in an activated state or when refreshing is completed in the corresponding memory sub-block, and transfers this refresh activation instruction signal to a local control circuit arranged for the memory sub-block on the next stage in a refresh activation instruction signal transferring path. Upon completion of refreshing in all the memory sub-blocks, refreshing is carried out on the next refresh address. It is possible to provide a semiconductor memory device which can fully hide a refreshing operation from outside.

Claims18

Dependent claims

A semiconductor memory device comprising:

a plurality of memory sub-blocks each having a plurality of memory cells;
refresh instruction issuing circuitry for issuing a refresh instruction instructing refreshing of storage data of the memory cells;
refresh address generation circuitry for generating a refresh address specifying a memory cell to be refreshed in each of said memory sub-blocks;
and
refresh control circuits, arranged corresponding to the respective memory sub-blocks, each for, upon receipt of said refresh instruction, permitting a refreshing operation to be carried out in a corresponding memory sub-block in accordance with said refresh address and transferring said refresh instruction to a subsequent memory sub-block at a subsequent stage in a transfer sequence of the refresh instruction when the refreshing operation is completed when a corresponding memory sub-block satisfies a condition different from a predetermined condition, while transferring the refresh instruction as received to the subsequent memory sub-block when the predetermined condition is satisfied in the corresponding memory sub-block.

2 more elements

Dependencies are inferred from the claim text.