Non-volatile semiconductor memory
AssigneeKabushiki Kaisha Toshiba
InventorsKen Takeuchi, Tamio Ikehashi, Toshihiko Himeno
Life of this patent
Estimating the term…
Abstract
A non-volatile semiconductor memory device includes a memory cell array having a plurality of non-volatile memory cells, a decode circuit configured to decode address data as input thereto to select a memory cell from the memory cell array, and a data sense circuit configured to detect and amplify the data of the selected memory cell of the memory cell array. The memory cell array includes an initial setup data region with initial setup data and status data being programmed thereinto. The initial setup data is used for determination of memory operating conditions, and the status data indicates whether the initial setup data region is presently normal or not in functionality.
Claims35
A non-volatile semiconductor memory comprising:
- a memory cell array having a plurality of non-volatile memory cells;
- a decode circuit configured to decode address data as input thereto to select a memory cell of said memory cell array;
- and
- a data sense circuit configured to sense and amplify data of the selected memory cell of said memory cell array, wherein
- said memory cell array includes an initial setup data region with initial setup data and status data programmed thereinto, said initial setup data being for determination of memory operating conditions, said status data indicating whether said initial setup data region is presently normal in functionality.
A non-volatile semiconductor memory comprising:
- a memory cell array having a plurality of non-volatile memory cells, said memory cell array having an initial setup data region with initial setup data and status data programmed thereinto, said initial setup data being for determination of memory operating conditions, said status data indicating whether said initial setup data region is presently normal in functionality;
- a decode circuit configured to decode input address data to select a memory cell of said memory cell array;
- a data sense circuit configured to sense and amplify data of the selected memory cell of said memory cell array;
- an operating condition setting circuit configured to store therein said initial setup data as read out of said initial setup data region and transferred therefrom and to control memory operating conditions;
- and
- a control circuit operatively responsive to receipt of said status data as read from said initial setup data region configured to control transfer of said initial setup data toward said operating condition setting circuit.
A non-volatile semiconductor memory comprising:
- a memory cell array with non-volatile memory cells disposed therein, having an initial setup data region with a first and a second data block, said first data block permitting initial setup data for determination of memory operating conditions to be programmed thereinto, said second data block allowing data identical to that of the first data block to be programmed thereinto, said initial setup data region storing status data as programmed thereinto, said status data indicating whether said initial setup data region is presently normal in functionality;
- a decode circuit configured to decode input address data to select a memory cell of said memory cell array;
- and
- a data sense circuit configured to sense and amplify the selected memory cell of said memory cell array.
Dependencies are inferred from the claim text.