Non-volatile semiconductor memory device

A non-volatile semiconductor memory device comprising:

• a memory cell array region in which are disposed a plurality of memory cells in both a column direction and a row direction, each of the memory cells having first and second non-volatile memory elements that are controlled by one word gate and first and second control gates;
• and
• a control gate drive section which drives the first and second control gates of the memory cells within the memory cell array region,
• wherein the memory cell array region is divided in the row direction into a plurality of sector regions,
• wherein the control gate drive section has a plurality of control gate drivers each of which corresponds to one of the sector regions, and each of the control gate drivers is capable of setting a potential for the first and second control gates within the corresponding sector region, independently of other sector regions,
• wherein k main control gate lines are connected to each of the control gate drivers each of which corresponds to one of the sector regions,
• wherein memory blocks corresponding to I/O lines formed by a group of the memory cells connected to k sub-control gate lines are arranged in the row direction in each of the sector regions, and
• wherein one of the k main control gate lines is connected to the corresponding one of the k sub-control gate lines.