Semiconductor memory device
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorTsukasa Ooishi
Life of this patent
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Abstract
A semiconductor memory device uses memory cells, which have structures not increasing areas, and are arranged in a distinctive manner providing high data holding stability. A semiconductor memory device includes memory cells formed on a main surface of a semiconductor substrate, and each having first and second transistors each having a gate electrode and impurity regions forming source/drain as well as one capacitor; and bit and word lines for controlling an operation of the memory cells, a cell plate forming an electrode of the capacitor being formed of the same layer as the gate electrode.
Claims8
A semiconductor memory de ice comprising:
- memory cells formed on a main surface of a semiconductor substrate, and each having first and second transistors each having a gate electrode and impurity regions forming source/drain as well as one capacitor;
- and
- bit and word lines for controlling an operation of said memory cells, wherein
- one of said impurity regions forming source/drain of said first transistor is electrically connected with a first bit line and the other impurity region forming source/drain is electrically connected with one electrode of said capacitor,
- one of said impurity regions forming source/drain of s id second transistor is electrically connected with a second bit line and the other impurity region forming source/drain is electrically connected with the other electrode of said capacitor, and
- a cell plate of said capacitor is formed of the same lay as said gate electrode.
A semiconductor memory device comprising:
- memory cells formed on a main surface of a semiconductor substrate, and each having first and second transistors each having a gate electrode and impurity regions forming source/drain as well as one capacitor;
- and
- bit and word lines for controlling an operation of said memory cells, wherein
- a cell plate of said capacitor has a belt-like form extending along said word line, and
- the impurity regions of said first and second transistors are opposed to said cell plate, are continuous to each other and are located along said belt-like cell plate.
Dependencies are inferred from the claim text.