Ferroelectric memory and method of reading the same
AssigneeIntel Corporation
InventorDavid GenLong Chow
Life of this patent
Estimating the term…
Abstract
A ferroelectric memory includes wordlines that cross over bitlines with a ferroelectric cell at each crossing. When reading a select cell of the array, sneak currents are drawn from an active bitline. An integration amplifier begins integrating charge propagated by the active bitline, and an active wordline receives a read level voltage. A first integration value is then obtained from the integration amplifier. Following the first integration, the integration amplifier is cleared and the voltage of the active wordline reduced to a quiescent level. Integration and wordline activation are again performed to obtain a second integration value. The second value is subtracted from the first, and the difference compared to a threshold to determine a data value.
Claims17
A method of reading a ferroelectric cell of a ferroelectric memory array, comprising:
- biasing a second electrically conductive line relative a first electrically conductive line to apply a quiescent level voltage of a magnitude less than that required to switch a polarization state of a ferroelectric cell between the first and the second electrically conductive lines;
- beginning a first integration of charge propagated by the first electrically conductive line;
- and
- after beginning the first integration, driving the second electrically conductive line relative to the first electrically with a read level voltage of a magnitude sufficient to switch a polarization of the ferroelectric cell.
A method of reading a stored state of a ferroelectric cell comprising:
- drawing sneak current from a bit line coupled to a plurality of ferroelectric cells;
- driving a ferroelectric cell of the plurality with an electric field sufficient to enable a polarization reversal of the ferroelectric cell and a charge release to the bit line;
- and
- integrating charge propagated by the bit line during the driving to obtain a first integration value;
- and
- beginning the integrating before the start of the driving.
A method of reading a ferroelectric cell of a ferroelectric memory array, comprising:
- drawing a sneak current from an active bitline of the plurality of bitlines;
- driving an active wordline of a plurality of wordlines with a first switching level pulse, the switching level defined relative to the active bitline and of a magnitude sufficient to switch a polarization state of an active ferroelectric cell between the active wordline and the active bitline;
- and
- integrating current on the active bitline to obtain a first integration value;
- beginning the integrating after the drawing sneak current from the active bitline and before the driving the active wordline with the switching level pulse;
- and
- continuing the integration for a duration to integrate charge released by the active ferroelectric cell during the driving.
Dependencies are inferred from the claim text.