Ternary content addressable memory with data and mask data settable therewithin by one write cycle

A content addressable memory device comprising:

• at least one ternary content addressable memory cell unit which stores one of the ternary data expressed by “0”, “1”, and “don't care” states, wherein the ternary content addressable memory cell unit comprises:
• a data cell for storing a bit of binary data,
• a mask cell for storing mask data that masks the bit of binary data from a searching operation,
• a data bit line to which data to be written to the data cell is applied,
• a mask bit line to which data to be written to the mask cell is applied,
• a search data line to which search data is applied,
• a word line which is commonly connected to the data cell and the mask cell,
• a match line for outputting a match/unmatch result between the data stored in the data cell and the search data, and
• a comparator which compares the data stored in the data cell with the search data, and outputs the result of the comparison if the mask data in the unmask state is stored in the mask cell, and outputs a match as the result of the comparison if the mask data in a mask state is stored in the mask cell;
• and
• a write circuit which writes the bit of binary data to the data cell while writing the mask data in an unmask state to the mask cell at the same time when the binary data is written to the ternary content addressable memory cell unit.