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US 6,646,583 B1Granted
High speed digital to analog converter using multiple staggered successive approximation cells
AssigneeMicron Technology, Inc.
InventorsEric R. Fossum, Sandor L. Barna
Life of this patent
Estimating the term…
Abstract
An image sensor system using offset analog to digital converters. The analog to digital converters require a plurality of clock cycles to carry out the actual conversion. These conversions are offset in time from one another, so that at each clock cycle, new data is available.
Claims24
An analog to digital converter, comprising:
- a plurality n of successive approximation type A/D converters, where there are at least three of said successive approximation A/D converters, arranged to receive image information in an analog form, and each of said n successive approximation type A/D converters outputting digital information at different times which are offset from one another.
A method, comprising:
- receiving pixel analog data from a plurality of image sensor elements;
- and
- converting said pixel analog data to digital in a way that takes multiple clock cycles, and in a way that staggers the output timing such that pixel data is available at each of a plurality of clock cycles.
A method, comprising:
- receiving image data in a plurality of image sensor elements, which output analog data;
- providing said analog data to a plurality of successive approximation type A/D converters which require a plurality of clock cycles to convert, said providing comprising providing different data to different A/D converters at different times, such that output digital values are available at staggered different times.
An image sensor system, comprising:
- a semiconductor substrate;
- an array of photoreceptors, arranged on said semiconductor substrate, and arranged to produce analog values indicative of received light energy in a plurality of pixels;
- a plurality of successive approximation A/D converters, which require a plurality N of clock cycles to make each conversion, where there are at least N of said successive approximation A/D converters;
- and
- a timing element, providing said analog values to said successive approximation A/D converters in a staggered way, such that at each of a plurality of clock cycles, at least one successive approximation A/D converter produces a digital output.
2 more elements
Dependencies are inferred from the claim text.