Delay circuit with delay relatively independent of process, voltage, and temperature variations

An apparatus for controlling delay over process, supply voltage, and temperature variations, comprising:

• an input terminal;
• an output terminal;
• a first path coupled between said input terminal and said output terminal, said first path including at least one relatively low-power output driver transistor that outputs a delayed representation of a received waveform to said output terminal;
• a second path coupled between said input terminal and said output terminal, said second path including at least one relatively high-power output driver transistor that outputs said delayed representation of a received waveform to said output terminal, said second path including a disabling circuit;
• a feedback path including a sensing circuit coupled to an output of said first path, said feedback path including an output coupled to said second path disabling circuit, wherein said feedback path outputs a feedback signal to said disabling circuit that increasingly disables said at least one relatively high-power output driver as a waveform output from said first path exceeds a threshold.

An apparatus for controlling delay over process, supply-voltage, and temperature variations, comprising:

• means for delaying a waveform;
• means for outputting said delayed waveform to an output terminal using at least one relatively low-power driver transistor;
• means for providing supplemental output drive to said output terminal after an expected period of delay, using at least one relatively high-power driver transistor;
• means for sensing a level of said delayed waveform;
• and
• means for reducing said supplemental output drive as said sensed level exceeds a threshold.

A method for controlling delay between an input of a circuit to an output of said circuit, over process, supply-voltage, and temperature variations, comprising:

• (1) receiving a waveform;
• (2) delaying said waveform using delay stages;
• (3) sensing a level of said delayed waveform;
• and
• (4) controlling at least one delay path between said input and
• said output in response to said sensed signal level to obtain a desired delay between said input and said output;
• wherein said delay stages include one or more relatively low-power drivers;
• wherein said at least one delay path includes one or more relatively high-power drivers.

An apparatus for controlling delay between an input of a circuit to an output of said circuit, over process, supply-voltage, and

• temperature variations, comprising:
• means for receiving a waveform;
• means for delaying said waveform using delay stages;
• means for sensing a level of said delayed waveform;
• and
• means for controlling at least one delay path between said input and said output in response to said sensed signal level to obtain a desired delay between said input and said outputs;
• wherein said delay stages include one or more relatively low-power drivers;
• wherein said at least one delay path includes one or more relatively high-power drivers.

A system for controlling delay over process, supply-voltage, and temperature variations, comprising:

• means for receiving a waveform;
• means for delaying said waveform;
• means for outputting said delayed waveform to an output terminal using at least one relatively low-power driver transistor;
• means for providing supplemental output drive to said output terminal after an expected period of delay, using at least one relatively high-power driver transistor;
• means for sensing a level of said delayed waveform;
• and
• means for reducing said supplemental output drive as said sensed level exceeds a threshold.