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US 6,646,486 B2Granted
Semiconductor integrated circuit
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsHideki Uchiki, Harufusa Kondoh
Life of this patent
Estimating the term…
Abstract
The semiconductor integrated circuit includes a first transistor which flows a current from a high voltage source to a first node, a second transistor which flows a current from the first node to a low voltage source. Furthermore, a first inverter receives an input signal and drives the first node based on this input signal, and a second inverter drives a second node based on a voltage of the first node.
Claims17
A semiconductor integrated circuit comprising:
- a first element connected between a first node and a first voltage line applied with a first voltage, for flowing a current from the first voltage line to the first node;
- a second element connected between the first node and a second voltage line applied with a second voltage lower than the first voltage, for flowing a current from the first node to the second voltage line;
- a first inverter having its output connected to the first node, for changing a voltage of the first node in a direction opposite to a direction of a voltage change of an input signal in response to the voltage change of the input signal;
- a second inverter having its output connected to a second node for output, for changing a voltage of the second node in a direction opposite to a direction of a voltage change of the first node in response to the voltage change of the first node;
- and
- a third element connected between a power source line for receiving a power source voltage and the first voltage line, for flowing a current from the power source line to the first voltage line,
- wherein the first voltage line is connected in common to the first and second inverters.
4 more elements
A semiconductor integrated circuit comprising:
- a first element connected between a first node and a first voltage line applied with a first voltage, for flowing a first current from the first voltage line to the first node;
- a second element connected between the first node and a second voltage line applied with a second voltage lower than the first voltage, for flowing a second current from the first node to the second voltage line;
- a p-channel type first MOS transistor having a source terminal for receiving the first voltage, a drain terminal connected to the first node, and a gate terminal for receiving an input signal;
- an n-channel type second MOS transistor having a source terminal for receiving the second voltage, a drain terminal connected to the first node, and a gate terminal for receiving an input signal;
- a p-channel type third MOS transistor having a source terminal for receiving the first voltage, a drain terminal connected to a second node for output, and a gate terminal connected to the first node;
- an n-channel type fourth MOS transistor having a source terminal for receiving the second voltage, a drain terminal connected to the second node, and a gate terminal connected to the first node;
- and
- a third element connected between a power source line for receiving a power source voltage and the first voltage line, for flowing a current from the power source line to the first voltage line,
- wherein the first voltage line is connected in common to source terminals of the first and third MOS transistors.
6 more elements
Dependencies are inferred from the claim text.