US 6,646,478 B2 · Method and apparatus for increasing capture range and jitter tolerance in phase detection circuits

Abstract

A phase detection system allows the capture range, lock range and jitter tolerance to be extended beyond ±360°. The capture range for the phase detection system may be extended in programmable amounts up to several thousand clock cycles or can be set to any desired maximum capture range in steps of approximately 360°. The phase detection system circuit utilizes a coarse phase detector and a fine phase detector. The phase detection system uses the digital cycle slip counter phase detector to provide a wide phase capture and lock range for a large jitter tolerance. The phase detection system combines this detector with a fine phase measurement from a PFD (phase and frequency detector) for very accurate phase control and low output jitter. The PFD operates in the approximately ±540° range and provides overlap in response with a coarse phase detector using a digital cycle counter approach. The PFD allows the digital counter, used for coarse cycle slip tracking, to precondition the PFD so that the coarse and fine detectors work together with no dead-band and no conflict in responses.

Claims16

Dependent claims

A phase and frequency detector (PFD) operable to detect phase and frequency differences between a first input signal and a second input signal, comprising:

a first and second logical component operable to capture phase differences between the first and second input signals of up to about ±360°, wherein the first logical component captures phase differences in the positive direction and the second logical component captures phase differences in the negative direction;
a third and fourth logical component operable to capture phase differences between the first and second input signals of between about ±360° to about ±540°, wherein the third logical component captures phase differences in the positive direction and the fourth logical component captures phase differences in the negative direction;
a plurality of resetting control blocks operable to reset the first, second, third and fourth logical components;
a first summation block to combine an output of the first logical component and an output of a third logical component to produce an up output signal that represents the positive input phase difference;
and
a second summation block to combine an output of the second logical component and an output of the fourth logical component to produce a down output signal that represents the negative input phase difference.

3 more elements

A phase detection system comprising:

a coarse phase detector operable to detect a phase difference between a first input signal and a second input signal;
and
a phase and frequency detector (PFD) operable to detect a phase difference of about ±540° between the first input signal and the second input signal and transmit an up output signal corresponding to a positive phase difference and a down output signal corresponding to a negative phase difference wherein the PFD is communicatively coupled to the coarse phase detector such that the coarse phase detector is operable to communicate a substantially 0° position to the PFD over a plurality of clock cycles and transmit a preconditioning signal to the PFD to provide that the coarse phase detector and the PFD pull in the same direction.

Dependencies are inferred from the claim text.

Method and apparatus for increasing capture range and jitter tolerance in phase detection circuits

Life of this patent

Method and apparatus for increasing capture range and jitter tolerance in phase detection circuits

Life of this patent

Abstract

Claims16