US 6,646,476 B2 · Pulse output circuit, shift register, and display device

Abstract

A circuit is provided which is constituted by TFTs of one conductivity type, and which is capable of outputting signals of a normal amplitude. When an input clock signal CK1 becomes a high level, each of TFTs (101, 103) is turned on to settle at a low level the potential at a signal output section (Out). A pulse is then input to a signal input section (In) and becomes high level. The gate potential of TFT (102) is increased to (VDD−V thN) and the gate is floated. TFT (102) is thus turned on. Then CK1 becomes low level and each of TFTs (101, 103) is turned off. Simultaneously, CK3 becomes high level and the potential at the signal output section is increased. Simultaneously, the potential at the gate of TFT (102) is increased to a level equal to or higher than (VDD+V thN) by the function of capacitor (104), so that the high level appearing at the signal output section (Out) becomes equal to VDD. When SP becomes low level; CK3 becomes low level; and CK1 becomes high level, the potential at the signal output section (Out) becomes low level again.

Claims38

Dependent claims

A pulse output circuit comprising:

first, second and third transistors, each having a gate electrode, a first electrode and a second electrode, and the second electrode of the first transistor electrically connected to the gate electrode of the second transistor;
a first signal input portion electrically connected to the gate electrodes of first and second transistors;
a second signal input portion electrically connected to the first electrode of the first transistor;
a third signal input portion electrically connected to the first electrode of the second transistor;
a power supply electrically connected to the first electrode of the third transistor;
and
a signal output portion electrically connected to the second electrodes of the second and third transistors,
wherein the first, second and third transistors are the same conductivity type, and
wherein capacitor means is disposed between the gate electrode and the first electrode of said second transistor or between the gate electrode and the second electrode of said second transistor.

6 more elements

A pulse output circuit comprising:

first, second and third transistors, each having a gate electrode, a first electrode and a second electrode, and the second electrode of the first transistor electrically connected to the gate electrode of the second transistor;
a first signal input portion electrically connected to the gate electrodes of first and second transistors;
an input change circuit electrically connected to the first electrode of the first transistor;
second and third signal input portions electrically connected to the input change circuit;
a fourth signal input portion electrically connected to the first electrode of the second transistor;
a power supply electrically connected to the first electrode of the third transistor;
and
a signal output portion electrically connected to the second electrodes of the second and third transistors,
wherein the first, second and third transistors are the same conductivity type, and
wherein capacitor means is disposed between the gate electrode and the first electrode of said second transistor or between the gate electrode and the second electrode of said second transistor.

7 more elements

A pulse output circuit comprising:

first, second and third transistors, each having a gate electrode, a first electrode and a second electrode, and the second electrode of the first transistor electrically connected to the gate electrode of the second transistor;
a first signal input portion electrically connected to the gate electrodes of first and second transistors;
an input change circuit electrically connected to the first electrode of the first transistor;
second and third signal input portions electrically connected to the input change circuit;
a fourth signal input portion electrically connected to the first electrode of the second transistor;
a power supply electrically connected to the first electrode of the third transistor;
and
a signal output portion electrically connected to the second electrodes of the second and third transistors,
wherein the first, second and third transistors are the same conductivity type,
wherein the input change circuit is in a first state, conduction is provided between the first electrode of the first transistor and the second signal input section and no conduction is provided between the first electrode of the first transistor and the third signal input section, and
wherein the input change circuit is in a second state, conduction is provided between the first electrode of the first transistor and the third signal input section and no conduction is provided between the first electrode of the first transistor and the second signal input section, and
wherein capacitor means is disposed between the gate electrode and the first electrode of said second transistor or between the gate electrode and the second electrode of said second transistor.

9 more elements

A shift register comprising:

first, second and third transistors, each having a gate electrode, a first electrode and a second electrode, and the second electrode of the first transistor electrically connected to the gate electrode of the second transistor;
a first signal input portion electrically connected to the gate electrodes of first and second transistors;
an input change circuit electrically connected to the first electrode of the first transistor;
second and third signal input portions electrically connected to the input change circuit;
a fourth signal input portion electrically connected to the first electrode of the second transistor;
a power supply electrically connected to the first electrode of the third transistor;
and
a signal output portion electrically connected to the second electrodes of the second and third transistors,
wherein the first, second and third transistors are the same conductivity type,
wherein the input change circuit is in a first state, conduction is provided between the first electrode of the first transistor and the second signal input section and no conduction is provided between the first electrode of the first transistor and the third signal input section, and
wherein the input change circuit is in a second state, conduction is provided between the first electrode of the first transistor and the third signal input section and no conduction is provided between the first electrode of the first transistor and the second signal input section, and
wherein capacitor means is disposed between the gate electrode and the first electrode of said second transistor or between the gate electrode and the second electrode of said second transistor.

9 more elements

Dependencies are inferred from the claim text.

Pulse output circuit, shift register, and display device

Life of this patent

Pulse output circuit, shift register, and display device

Life of this patent

Abstract

Claims38