Impedance emulator
AssigneeAlliance Semiconductor Corporation
InventorDan Ion Hariton
Life of this patent
Estimating the term…
Abstract
A method and device to emulate impedances includes a pair of impedances connected in series between two circuit nodes, the impedances forming a voltage divider having at its midpoint a reference voltage VX. An OP AMP includes a positive input connected to the VX—node and the negative input connected to the output thereof in a direct feedback loop. The OP AMP output is also connected to a load impedance that is connected either one of the nodes. A transistor may be interposed between the load impedance and the circuit node. The OP AMP may be provided with a negative gain to emulate an inductor. The voltage divider may be variable to emulate a variable impedance.
Claims15
A impedance emulating device, including:
- a voltage divider connected between two circuit nodes having a potential difference, said voltage divider having a midpoint node at voltage VX;
- said voltage divider including at least one impedance having a reactive component;
- amplifier means having an output, and having an input connected to VX;
- a load impedance connected between said output and one of said circuit nodes;
- said voltage divider and said load impedance having values scaled so that said output replicates the output of an emulated impedance of predetermined reactance and magnitude.
A impedance emulating device, including:
- a voltage divider connected between two circuit nodes having a potential difference, said voltage divider having a midpoint node at voltage VX;
- said voltage divider including at least one impedance having a reactive component;
- an OP AMP having one input connected to VX;
- a load impedance connected at one end to one of said circuit nodes;
- a transistor having a gate connected to the output of said OP AMP and a source/drain circuit connected between the other end of said load impedance and the other of said circuit nodes;
- the other input of said OP AMP connected to said other end of said load impedance;
- said voltage divider and said load impedance having values scaled so that the impedance between said circuit nodes replicates an emulated impedance of predetermined reactance and magnitude.
In an integrated circuit construction, a method for emulating a large reactive impedance, comprising the steps of:
- providing a voltage divider connected between two circuit nodes having a potential difference, said voltage divider having a midpoint node at voltage VX;
- said voltage divider including at least one impedance having a reactive component;
- providing an OP AMP having one input connected to VX;
- connecting one end of a load impedance to one of said circuit nodes;
- providing a transistor having a gate connected to the output of said OP AMP and a source/drain circuit connected between the other end of said load impedance and the other of said circuit nodes;
- connecting the other input of said OP AMP to said other end of said load impedance;
- said voltage divider and said load impedance having values scaled so that the impedance between said circuit nodes replicates an emulated impedance of predetermined reactance and magnitude.
Dependencies are inferred from the claim text.