US 6,645,810 B2 · Method to fabricate MIM capacitor using damascene process

Abstract

In one embodiment, the present invention recites forming a number of first openings in a first substrate. The present embodiment then recites forming a copper region within each first openings during a damascene process, wherein each copper region has a top surface. The present embodiment then disposes a dielectric layer proximate to the top surface of each of the first copper regions during the damascene process. After depositing a second substrate over the dielectric, a number of second openings in a second substrate are made. Next, a number of second copper regions are formed in the second openings, during the damascene process. The dielectric region is thus disposed between the first copper regions and the second copper regions. In so doing, the dielectric region forms a dielectric barrier between the first copper regions and the second copper regions such that a metal-insulator-metal (MIM) capacitor is formed during a damascene process.

Claims13

Dependent claims

A method for forming a MIM capacitor during a multi-damascene process, said method comprising the steps of:

a) forming a first capacitor electrode comprising a first plurality of metal regions during a first damascene process, each of said first plurality of metal regions having a top surface;
b) disposing a dielectric region proximate to said top surfaces of said first plurality of metal regions;
and
c) forming a second capacitor electrode comprising a second plurality of metal regions during a second damascene process on top of said dielectric region with said dielectric region disposed between said first plurality of metal regions and said second plurality of metal regions such that said MIM capacitor is formed during said multi-damascene process.

1 more element

A method for forming a metal insulator metal (MIM) copper metal-containing capacitor during a multi-damascene process, said method comprising the steps of:

a) forming a first plurality of openings in a first substrate,
b) forming a first capacitor electrode comprising a first plurality of copper regions within said first plurality of openings during a first damascene process, said plurality of copper regions each having a top surface and at least one side surface, wherein the sides of said plurality of copper regions are separated by said first substrate;
c) disposing a dielectric layer on top of said top surfaces of said first plurality of copper regions;
d) forming a second plurality of openings in a second substrate on top of said dielectric layer;
and
e) forming a second capacitor electrode comprising a second plurality of copper regions within said second plurality of openings during a second damascene process, with said dielectric layer disposed between said first plurality of copper regions and said second plurality of copper regions and forming a dielectric barrier between said first plurality of copper regions and said second plurality of copper regions such that said MIM capacitor is formed.

3 more elements

Dependencies are inferred from the claim text.

Method to fabricate MIM capacitor using damascene process

Life of this patent

Method to fabricate MIM capacitor using damascene process

Life of this patent

Abstract

Claims13