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US 6,643,834 B2Granted
Method of and apparatus for designing layout of analog cells, and computer product
AssigneesMitsubishi Denki Kabushiki Kaisha, Mitsubishi Electric System LSI Design Corporation
InventorsTakao Satoh, Takeshi Senoh, Takashi Koyama
Life of this patent
Estimating the term…
Abstract
Data corresponding to an analog circuit diagram is generated and stored. Circuit connection information is extracted based on the analog circuit diagram data and stored. Devices to be paired are predicted and extracted based on the circuit connection information. The devices added as design constraints to the circuit connection information, and the result of addition is stored. Layout cells are placed on the basis of the circuit connection information including the design constraints. Routing of the layout cells is conducted.
Claims19
An analog cell layout designing apparatus comprising:
- a circuit diagram generating unit which generates an analog circuit diagram;
- a circuit diagram storing unit which stores circuit diagram data corresponding to the analog circuit diagram generated by said circuit diagram generating unit;
- a circuit connection information extracting unit which extracts circuit connection information from the analog circuit diagram data stored in said circuit diagram storing unit;
- a first circuit connection information storing unit which stores circuit connection information extracted by said circuit connection information extracting unit;
- a design constraint predicting and extracting unit which predicts and extracts devices to be paired from the circuit connection information stored in said first circuit connection information storing unit and adding the devices extracted as design constraints to the circuit connection information;
- a second circuit connection information storing unit which stores the circuit connection information to which the design constraints are added by said design constraint predicting and extracting unit;
- an automatic placing unit which places layout cells selected based on the circuit connection information including the design constraints, stored in said second circuit connection information storing unit in accordance with a process design rule;
- and
- an automatic routing unit which conducts routing of the layout cells placed by said automatic placing unit in accordance with the process design rule.
6 more elements
An analog cell layout designing method comprising:
- a circuit diagram generating step of generating an analog circuit diagram;
- a circuit diagram data storing step of storing circuit diagram data corresponding to the analog circuit diagram generated in the circuit diagram generating step;
- a circuit connection information extracting step of extracting circuit connection information from the stored analog circuit diagram data;
- a first circuit connection information storing step of storing the circuit connection information extracted in the circuit connection information extracting step;
- a design constraint predicting and extracting step of predicting and extracting devices to be paired from the stored circuit connection information and adding the devices extracted as design constraints to the circuit connection information;
- a second circuit connection information storing step of storing the circuit connection information to which the design constraints are added in the design constraint predicting and extracting step;
- an automatic placing step of placing layout cells selected based on the stored circuit connection information including the design constraints in accordance with a process design rule;
- and
- an automatic routing step of conducting routing of the layout cells placed in the automatic placing step in accordance with the process design rule.
6 more elements
A computer program for causing a computer to perform:
- a circuit diagram generating step of generating an analog circuit diagram;
- a circuit diagram data storing step of storing circuit diagram data corresponding to the analog circuit diagram generated in the circuit diagram generating step;
- a circuit connection information extracting step of extracting circuit connection information from the stored analog circuit diagram data;
- a first circuit connection information storing step of storing the circuit connection information extracted in the circuit connection information extracting step;
- a design constraint predicting and extracting step of predicting and extracting devices to be paired from the stored circuit connection information and adding the devices extracted as design constraints to the circuit connection information;
- a second circuit connection information storing step of storing the circuit connection information to which the design constraints are added in the design constraint predicting and extracting step;
- an automatic placing step of placing layout cells selected on the basis of the stored circuit connection information including the design constraints in accordance with a process design rule;
- and
- an automatic routing step of conducting routing of the layout cells placed in the automatic placing step in accordance with the process design rule.
6 more elements
Dependencies are inferred from the claim text.