Apparatus for transferring and holding data based on a selected clock rate
AssigneeOki Electric Industry Co., Ltd.
InventorShinichi Kouzuma
Life of this patent
Estimating the term…
Abstract
A data transfer circuit has a control circuit which outputs a clock control signal and a data control signal and receives a selectively controlled write signal and a fixed voltage level corresponding to a mode instruction signal-. An AND gate acts as a first transfer circuit which transfers the clock signal to a holding circuit corresponding to the clock control signal, and a second transfer circuit transfers a data signal to the holding circuit.
Claims16
A data transfer circuit controlled by a clock signal and a control signal, the data transfer circuit outputting and holding a signal corresponding to an inputted data signal, the data transfer circuit comprising:
- a holding circuit having a clock terminal, a data terminal and an output terminal, the holding circuit outputting an output signal having a determined voltage level according to a voltage level of a signal inputted to said data terminal corresponding with a predetermined change of a voltage level of a signal inputted to said clock terminal, and holding the outputted signal;
- a control circuit outputting a clock control signal and a data control signal, one of the clock and data control signals having a voltage level according to said control signal and another one of the clock and data control signals having a predetermined voltage level corresponding to an instruction signal, the instruction signal instructing a first mode changing the voltage level of said clock signal during a predetermined period or a second mode changing the voltage level of said clock signal during a period shorter than the period of the first mode by the voltage level of the instruction signal;
- a first transfer circuit transferring a signal according to said clock signal or said control signal corresponding to the voltage level of said clock control signal to said clock terminal as a first transfer signal;
- and
- a second transfer circuit transferring a signal according to said clock signal or said control signal corresponding to the voltage level of said data control signal to said data terminal as a second transfer signal.
A means for transferring data, the transferring means being controlled by a clock signal and a control signal and outputting and holding a signal corresponding to an inputted data signal and comprising:
- a means for holding data, the holding means having a clock terminal, a data terminal and an output terminal, and outputting an output signal having a determined voltage level according to a voltage level of a signal inputted to said data terminal corresponding with a predetermined change of a voltage level of a signal inputted to said clock terminal;
- a means for controlling the clock signal and the control signal, the controlling means outputting a clock control signal and a data control signal, one of the clock and data control signals having a voltage level according to said control signal and another one of the clock and data control signals having a predetermined voltage level corresponding to an instruction signal, the instruction signal instructing a first mode changing the voltage level of said clock signal during a predetermined period or a second mode changing the voltage level of said clock signal during a period shorter than the period of the first mode by the voltage level of the instruction signal;
- a first means for transferring a signal according to said clock signal or said control signal corresponding to the voltage level of said clock control signal to said clock terminal as a first transfer signal;
- and
- a second means for transferring a signal according to said clock signal or said control signal corresponding to the voltage level of said data control signal to said data terminal as a second transfer signal.
Dependencies are inferred from the claim text.