Flash memory capable of changing bank configuration
AssigneeFujitsu Limited
InventorsTakaaki Furuyama, Mitsuhiro Nagao
Life of this patent
Estimating the term…
Abstract
According to one aspect of the present invention, the flash memory comprises a memory region divided into a plurality of real banks, wherein from among the plurality of products which consists of a plurality of combinations of virtual banks having at least one real bank; and a combination of the top boot in which the most significant address is allocated to the boot bank having the boot sector and the bottom boot in which the least significant address is allocated to the boot bank, product information data are set in a product information record section, whereby any product can be configured.
Claims15
A nonvolatile memory which can modify a configuration of a virtual bank having at least one real bank, comprising:
- a plurality of real banks having a plurality of memory cells, respectively;
- a product information memory for storing product information data having the virtual bank configuration;
- an address transforming section for converting a supplied address into an internal address according to the product information data;
- and
- a bank busy detection circuit which is provided in each of the real banks, and generates a program/erase state signal designating whether or not a corresponding real bank is under the program or erase operations, and generates a readout enabling signal for instructing an enabling or prohibition of a readout of the corresponding real bank in accordance with the program/erase state signal of the real bank belonging to the same virtual bank in response to a real bank selecting signal at the time of a readout, wherein
- the real bank belonging to the virtual bank is configured to be modified in accordance with the product information data, and the bank busy detection circuit generates the readout enabling signal of prohibiting the readout when any one of the program/erase state signals of the real bank belonging to the virtual bank established according to the product information data is in a program or erase operations state.
A nonvolatile memory which can modify a configuration of a virtual bank having at least one real bank, comprising:
- a plurality of real banks having a plurality of memory cells, respectively;
- a product information memory for storing product information data having combinational information of a real bank configuration belonging to the virtual bank and a top boot and bottom boot configuration in which a boot real bank is assigned to a most significant or a least significant address;
- an address transforming section for converting a supplied address into an internal address in accordance to the product information data;
- and
- a bank busy detection circuit which is provided in each of the real banks, and generates a program/erase state signal designating whether or not a corresponding real bank is under the program or erase operations, and generates a readout enabling signal for instructing an enabling or prohibition of a readout of such the corresponding real bank in accordance with the program/erase state signal of the real bank belonging to the same virtual bank in response to a real bank selecting signal at the time of a readout, wherein
- the real bank belonging to the virtual bank is configured to be modified in accordance with the product information data, and the bank busy detection circuit generates a readout enabling signal of prohibiting the readout when any one of the program/erase state signals of the real bank belonging to the virtual bank established in accordance to the product information data is in a program or erase operations state.
A nonvolatile memory which can modify a configuration of a virtual bank having at least one real bank, comprising:
- a plurality of real banks having a plurality of memory cells, respectively;
- a product information memory for storing product information data distinguishing a real bank configuration belonging to the virtual bank;
- and
- a bank busy detection circuit which is provided in each of the real banks, and generates a program/erase state signal designating whether or not a corresponding real bank is under the program or erase operations, and generates a readout enabling signal for instructing an enabling or prohibition of a readout of the corresponding real bank in accordance with the program/erase state signal of the real bank belonging to the same virtual bank in response to a real bank selecting signal at the time of a readout, wherein
- the real bank belonging to the virtual bank is configured to be modified in accordance with the product information data, and the bank busy detection circuit generates a readout enabling signal of prohibiting the readout when any one of the program/erase state signals of the real bank belonging to the virtual bank established in accordance to the product information data is in a program or erase operations state.
A nonvolatile memory which can modify a configuration of a virtual bank having at least one real bank, comprising:
- a plurality of real banks having a plurality of memory cells, respectively;
- a product information memory for storing product information data having a configuration of the real bank belonging to the virtual bank;
- and
- an address transforming section for converting a supplied address into an internal address in accordance to the product information data, wherein
- the address transforming section reverses or non-reverses the supplied address in response to the product information data.
Dependencies are inferred from the claim text.