Method and apparatus for prefetching data into cache

An apparatus comprising:

• a higher level cache associated with a buffer having a control field and a lower level cache;
• a decoder to decode instructions;
• and
• a circuit coupled to the decoder, said circuit in response to a first decoded instruction corresponding to a cacheable request to
• issue a request to retrieve data at an address from external memory to place said data only in the lower level cache based on the control field, and
• place said data in said higher level cache upon detection of a second decoded instruction to said address, the second decoded instruction being a higher level cacheable instruction.

An apparatus comprising:

• a higher level cache associated with a buffer having a control field and a lower level cache;
• a decoder to decode instructions;
• and
• a circuit coupled to the decoder, said circuit in response to a first decoded instruction corresponding to a cacheable request to
• allocate said buffer and issue a request to retrieve data at an address from external memory and place said data only in the lower level cache based on the control field,
• retrieve said data from said buffer, and
• place said data in the higher level cache upon detection of a second cacheable decoded instruction to said address, the second cacheable decoded instruction being a higher level cacheable instruction.

A method, comprising:

• decoding a first instruction corresponding to a cacheable request to at least one of a lower level cache and a higher level cache, the higher level cache being associated with a buffer having a control field;
• allocating said buffer to issue a request to retrieve data at an address in external memory to place said data only in the lower level cache based on the control field;
• receiving said data in said buffer;
• detecting a second instruction to said address;
• and
• placing said data in the higher level cache, the second instruction being a higher level cacheable instruction.