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AssigneeInternational Business Machines Corporation
InventorsYefim Shuf, Hubertus Franke, Manish Gupta
Estimating the term…
The invention teaches how to reduce the traffic associated with handling cache lines containing useless data (i.e. cache lines corresponding to pages that have been invalidated). The invention makes it possible to evict such cache lines earlier, to avoid write backs of useless data from such cache lines to main memory, and to avoid transmitting useless data from such cache lines to the requesting remote coherence controller in a multiprocessor system. The present invention describes a mechanism for invalidating cache lines containing useless data transparently and without programmer's involvement. For efficiency, the content of a cache line containing useless data is invalidated only when the line is referenced or is about to be allocated for some new data.
Apparatus for managing traffic in a memory subsystem, comprising:
An apparatus for managing cache lines in a cache, comprising:
Apparatus for managing entries in a memory subsystem component, comprising:
A method of managing traffic in a memory subsystem, comprising the steps:
A method of managing cache lines in a cache, comprising the steps:
A method of managing entries in a memory subsystem component, comprising the steps:
A program storage device readable by machine, tangibly embodying a program of instructions executable by the machine to perform method steps for managing traffic in a memory subsystem, said method steps comprising:
Dependencies are inferred from the claim text.