US 6,643,724 B2 · Method and apparatus for interrupt routing of PCI adapters via device address mapping

Abstract

A method and apparatus are provided for interrupt routing of peripheral component interconnect (PCI) adapters via device address mapping. A first processor complex includes a multifunction PCI to PCI bridge interface chip. A local PCI bus is coupled between a second processor complex and the multifunction PCI to PCI bridge interface chip. A host PCI bus is coupled between the multifunction PCI to PCI bridge interface chip and a second multifunction PCI to PCI bridge chip. A plurality of local area network (LAN) adapters are coupled to the second multifunction PCI to PCI bridge chip. The multifunction PCI to PCI bridge interface chip of the first processor complex includes interrupt mapping logic for mapping interrupts from the LAN adapters to PCI interrupts on the local PCI bus to the second processor complex. The multifunction PCI to PCI bridge interface chip of the first processor complex includes translation logic for translating a configuration cycle on the local PCI bus from the second processor complex to another configuration cycle on the host PCI bus and for translating a configuration cycle on the host PCI bus from the LAN adapters to another configuration cycle on the local PCI bus to the second processor complex. The multifunction PCI to PCI bridge interface chip of the first processor complex includes a bus number register for specifying a PCI bus number and a device translation register for specifies a translation value for each function of the multifunction PCI to PCI bridge interface chip for determining a device number of each of said plurality of local area network (LAN) adapters.

Claims12

Dependent claims

Apparatus for interrupt routing of peripheral component interconnect (PCI) adapters via device address mapping comprising:

a first processor complex;
said first processor complex including a multifunction PCI to PCI bridge interface chip;
a second processor complex;
a local PCI bus coupled between said second processor complex and said multifunction PCI to PCI bridge interface chip;
a host PCI bus coupled between said multifunction PCI to PCI bridge interface chip and a second multifunction PCI to PCI bridge chip;
a plurality of PCI adapters coupled to said second multifunction PCI to PCI bridge chip;
and
said multifunction PCI to PCI bridge interface chip of said first processor complex including interrupt mapping logic for mapping interrupts from said PCI adapters to PCI interrupts on said local PCI bus.

5 more elements

A method for interrupt routing of peripheral component interconnect (PCI) adapters in a system including a first processor complex including a multifunction PCI to PCI bridge interface chip and a second processor complex;

a local PCI bus coupled between the second processor complex and the multifunction PCI to PCI bridge interface chip;
a host PCI bus coupled between the multifunction PCI to PCI bridge interface chip and a second multifunction PCI to PCI bridge chip;
and a plurality of PCI adapters coupled to the second multifunction PCI to PCI bridge chip said method comprising the steps of:
providing interrupt mapping logic and translation functions in the multifunction PCI to PCI bridge interface chip of said first processor complex,
utilizing the multifunction PCI to PCI bridge interface chip, mapping interrupts from the PCI adapters to PCI interrupts on the local PCI bus to the second processor complex;
utilizing the multifunction PCI to PCI bridge interface chip of said first processor complex, translating device and bus numbers between the local bus and the host PCI bus.

3 more elements

Dependencies are inferred from the claim text.

Method and apparatus for interrupt routing of PCI adapters via device address mapping

Life of this patent

Method and apparatus for interrupt routing of PCI adapters via device address mapping

Life of this patent

Abstract

Claims12