Apparatus and method for controlling a phase-locked loop circuit
AssigneeTexas Instruments Incorporated
InventorsPascal Audinot, Andrew M. Henwood
Life of this patent
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Abstract
A first and second phase-locked loop each having their frequency of operation under programmable control by changing the divider ratio. A single programming word contains the divider ratio for the first phase-locked loop and addressing bits which address a plurality of auxiliary registers for changing the divider ratio of the second phase-locked loop. In a cellular telephone, this allows the digital signal processor to change from receive to transmit mode or from one transmit mode or from one frequency to another utilizing a single command word.
Claims20
A phase-locked loop circuit comprising:
- a plurality of phase-locked loops, each phase-locked loop having a voltage controlled oscillator operating at a different frequency, the frequency of operation of each voltage controlled oscillator being determined by a divide ratio of the voltage controlled oscillator output frequency to a phase frequency detector, said divide ratio for each phase-locked loop being programmable;
- a processor circuit coupled to said voltage controlled oscillators for generating a control word for programming each of said voltage controlled oscillators, a first portion of said control word programming a divide ratio for a first voltage controlled oscillator and a second portion of said control word addressing an auxiliary register containing a control word for programming a divide ratio for a second voltage controlled oscillator.
In a cellular telephone, a phase-locked loop circuit for generating a first local oscillator frequency for a first mixer and a second local oscillator frequency different from said first local oscillator frequency for a second mixer, the frequency of said first and said second local oscillators being changed between first and second modes of operation of said cellular telephone comprising:
- a first phase-locked loop for generating said first local oscillator frequency, a frequency of operation said first phase-locked loop being under programmable control;
- a second phase-locked loop for generating said second local oscillator frequency, a frequency of operation said second phase-locked loop being under programmable control;
- a processor for generating a control word coupled to said first and said second phase-locked loops, said control word having bits for setting the operating frequency of said first phase-locked loop and having fewer than the number of bits required to set the operating frequency of said second phase-locked loop.
A cellular telephone comprising:
- a transmit circuit;
- a receive circuit;
- first and second mixers in said transmit circuit and third and fourth mixers in said receive circuit;
- a phase-locked loop circuit having a first phase-locked loop for generating a local oscillator frequency for said first and third mixers, said first local oscillator frequency being different during transmit and receive operations of said cellular telephone, and a second phase-locked loop for generating a local oscillator frequency for said second and fourth mixers, said second local oscillator frequency being different during transmit and receive operations of said cellular telephone and different from said first local oscillator frequency;
- a processor for generating a single control word for setting the frequency of said first and said second phase-locked loop, said control word having bits for setting the operating frequency of said first phase-locked loop and having fewer than the number of bits required to set the operating frequency of said second phase-locked loop.
A method for operating a cellular telephone having a plurality of phase-locked loops, each phase-locked loop having a voltage controlled oscillator operating at a different frequency, the frequency of operation of each voltage controlled oscillator being determined by a divide ratio of the voltage controlled oscillator output frequency to a phase frequency detector, said divide ratio being programmed by processor, the method comprising:
- serially transmitting a control word from said processor to a phase-locked loop circuit for programming first and second divide ratios for first and second voltage controlled oscillators, respectively;
- decoding said control word to generate a divide ratio for said first voltage controlled oscillator and an address of an auxiliary register;
- addressing said auxiliary register to read out a divide ratio for said second voltage controlled oscillator.
Dependencies are inferred from the claim text.