APD bias circuit

An APD bias circuit adapted to a circuit having an APD receiving an optical signal, and an equalizer amplifier receiving an output signal of the APD, said APD bias circuit comprising:

• first, second and third resistors connected in series to the APD to which a bias voltage is applied therethrough;
• a bias control circuit connected to a first node between the first and second resistors, the bias control circuit receiving a current from the first node so that a voltage of the first node can be maintained at a constant level;
• a first capacitor connected between a ground and a second node between the second and third resistors;
• and
• a second capacitor connected between the ground and a third node between the third resistor and the APD,
• a first time constant defined by the second resistor and the first capacitor being greater than a second time constant defined by the third resistor and the second capacitor.