Passive alignment using slanted wall pedestal
AssigneeCorning Incorporated
InventorsIan Cayrefourcq, Chandrasekhar Pusarla
Life of this patent
Estimating the term…
Abstract
An apparatus is provided including a first chip having a plurality of solder bumps and recesses formed therein at preselected locations. A second chip is provided with a plurality of solder pads and projections. A plurality of solder bonds are coupled between the first and second chips. At least one of the recesses and projections includes angled walls for capturing and directing the other during reflow of the solder bonds such that the first chip aligns relative to the second chip under the surface tension of the solder bonds. If desired, vibrating waves may be applied to the first and second chips during reflow to assist movement of the projections relative to the recesses.
Claims18
An apparatus comprising:
- a first chip including a plurality of bonding bumps formed thereon, said first chip also including a plurality of recesses formed therein at pre-selected locations relative to said plurality of bonding bumps;
- a second chip including a plurality of bonding pads formed thereon, said second chip also including a plurality of projections extending therefrom at pre-selected locations relative to said plurality of bonding pads;
- and
- a plurality of bonding members coupled between at least one of:
- said plurality of bonding bumps and said plurality of bonding pads;
- and
- said plurality of projections adjacent said plurality of recesses;
- wherein at least one of said plurality of recesses and said plurality of projections includes angled walls for capturing and directing the other of said plurality of recesses and said plurality of projections during reflow of said bonding members such that said first chip aligns relative to said second chip;
- and
- wherein said plurality of projections further comprise one of a plurality of conical and pyramidal members.
A method of interconnecting a pair of chips comprising:
- providing a first chip;
- forming a plurality of recesses in said first chip at pre-selected locations;
- providing a second chip;
- forming a plurality of projections on said second chip at pre-selected locations relative to said plurality of recesses;
- positioning said plurality of projections proximate said plurality of recesses;
- and
- applying vibrating waves to said first and second chips to move said first chip relative to said second chip until said plurality of projections enter said plurality of recesses.
A method of mechanically and electrically interconnecting an optoelectronic device with an optical component supporting substrate comprising:
- forming a plurality of bonding bumps on said device;
- forming a plurality of recesses in said device at pre-selected locations relative to said bonding bumps;
- forming a plurality of bonding pads on said substrate;
- forming a plurality of projections on said substrate at pre-selected locations relative to said bonding pads;
- coupling a plurality of bonding members to at least one of said plurality of bonding bumps and said plurality of bonding pads;
- positioning said device on said substrate such that said bonding members are proximate at least one of said plurality of recesses;
- and said plurality of projections;
- melting said plurality of bonding members such that said device is free to move relative to said substrate due to a surface tension of said plurality of bonding members and frictional interference of said plurality of projections and said plurality of recesses;
- applying vibrating waves to said device and said substrate during said melting step to assist movement of said plurality of projections relative to said plurality of recesses and
- cooling said plurality of bonding members;
- wherein at least one of said plurality of projections and said plurality of recesses includes angled walls for capturing and directing the other of said plurality of recesses and said plurality of projections during reflow of said plurality of bonding members such that said device aligns relative to said substrate.
Dependencies are inferred from the claim text.