RAM circuit with redundant word lines

A RAM circuit, comprising:

• a memory cell array including memory cells, rows and columns;
• said rows and columns defining a row direction and a column direction and forming a matrix configuration, a total number of said rows being an integer multiple of an integer number p>1, said rows including an integer number n of regular rows and an integer number r of redundant rows;
• regular word lines and redundant word lines;
• each of said rows being assigned a respective one of said regular and redundant word lines for activating and deactivating said memory cells in a relevant one of said rows;
• said memory cell array having column-parallel side edges;
• a driver array disposed parallel to one of said column-parallel side edges of said memory cell array, said driver array including a plurality of drivers, a respective one of said drivers being contact-connected to a respective one of said regular and redundant word lines for driving said respective one of said regular and redundant word lines;
• said memory cell array and said driver array occupying a given space subdivided into a first section and a second section;
• an integer number n1>0 of said regular rows and an integer number r1>0 of said redundant rows being disposed in said first section, and n1+r1 of said drivers being disposed in said first section;
• an integer number n2>0 of said regular rows and an integer number r2>0 of said redundant rows being disposed in said second section, where n1+r1 is by an integer number k less than an integer multiple of the integer number p, and n2+r2 of said drivers being disposed in said second section;
• said n1+r1 of said drivers disposed in said first section each occupying a respective location allocated thereto in a regular two-dimensional first pattern of locations, said locations in said first pattern having Y coordinates measured in the column direction, the Y coordinates of said locations in said first pattern being uniformly spaced apart, each of said locations in said first pattern having one of p possible X coordinates in the row direction, adjacent ones of said locations in said first pattern with a same one of the X coordinates being spaced apart by a distance in the column direction equal to p times a spacing distance of the Y coordinates of said locations in said first pattern;
• said n2+r2 of said drivers disposed in said second section each occupying a respective location allocated thereto in a regular two-dimensional second pattern of locations, said locations in said second pattern having Y coordinates measured in the column direction, the Y coordinates of said locations in said second pattern being uniformly spaced apart, each of said locations in said second pattern having one of said p possible X coordinates in the row direction, adjacent ones of said locations in said second pattern with a same one of the X coordinates being spaced apart by a distance in the column direction equal to p times a spacing distance of the Y coordinates of said locations in said second pattern;
• said first section having an outer edge with p−k last ones of said locations in said first pattern disposed in said outer edge;
• and
• said locations in said first pattern being occupied without any vacancies within said first section and, within said second section, p−k of said locations in said second pattern being unoccupied locations with X coordinates identical to the x coordinates of said p−k last ones of said locations in said first pattern.