Redundant memory circuit for analog semiconductor memory

A redundant memory circuit in an analog semiconductor memory, including:

• a cell array having a first end and a second end, a plurality of word lines extending from the first end to the second end of the cell array, and a plurality of memory cells connected to the word lines, each memory cell storing an analog value;
• and
• a word line selector for selecting the word lines;
• wherein the cell array comprises:
• a plurality of sectors disposed sequentially from the first end of the cell array to the second end of the cell array, each sector including a plurality of said memory cells, the sectors being accessed in sequence from one end among the first end and second end of the cell array to another end among the first end and the second end of the cell array;
• and
• a redundant sector disposed centrally in the cell array, for use in replacement of a bad sector among the sectors in the cell array, the redundant sector including a plurality of said memory cells, the redundant sector being accessed in place of the bad sector in said sequence.

A redundant memory circuit in an analog semiconductor memory, including:

• a cell array having a first end and a second end, a plurality of word lines extending from the first end to the second end of the cell array, and a plurality of memory cells connected to the word lines, each memory cell storing an analog value, the cell array being divided into a plurality of sectors and having at least one redundant sector for replacing a bad sector among said sectors;
• a word line selector for selecting the word lines;
• and
• a sector selection circuit for selecting the sectors and redundant sector so that, when said bad sector is replaced by the redundant sector, the redundant sector and the sectors, taken together but excluding the bad sector, are accessed in sequence from one end among the first end and second end of the cell array to another end among the first end and the second end of the cell array.

A redundant memory circuit in an analog semiconductor memory, including:

• a cell array having a first end and a second end, a plurality of word lines extending from the first end to the second end of the cell array, and a plurality of memory cells connected to the word lines, each memory cell storing an analog value, the cell array being divided into a plurality of sectors and having at least one redundant sector for replacing a bad sector among said sectors;
• and
• a word line selector, disposed midway between the first and the second end of the cell array, for selecting the word lines;
• wherein the sectors are accessed in a sequence from the first end to the second end of the cell array, and when said bad sector is replaced by the redundant sector, the redundant sector is accessed in place of the bad sector in said sequence.

A redundant memory circuit in an analog semiconductor memory, including:

• a first cell array having a plurality of word lines and a plurality of memory cells connected to the word lines, each memory cell storing an analog value, the first cell array being divided into a plurality of sectors and having at least one first redundant sector;
• a second cell array having another plurality of word lines and another plurality of memory cells connected to the word lines, each memory cell storing an analog value, the second cell array being divided into another plurality of sectors and having at least one second redundant sector;
• a first word line selector for selecting the word lines in the first cell array;
• a second word line selector for selecting the word lines in the second cell array;
• and
• a redundant sector selection circuit for selecting the first redundant sector and the second redundant sector, thereby enabling any two bad sectors in the first cell array and the second cell array to be replaced by the first redundant sector and the second redundant sector, even if the two bad sectors are both disposed in the same cell array among the first cell array and the second cell array.