Array substrate for a liquid crystal display and method for fabricating thereof with insulating stack made from TFT layers between crossed conductors

An array substrate having thin film transistors, pixel electrodes, gate lines and data lines, wherein each thin film transistor is formed at a crossover point of each pairs of gate lines and data lines, and wherein each pixel electrode is formed in a pixel region defined by each of the pairs of gate lines and data lines, the array substrate comprising:

• a plurality of data pads formed at a first end of the data lines and connected thereto, the data pads including odd numbered data pads and even numbered data pads, each data pad having a first contact hole;
• a first shorting bar formed adjacent to the data pads and arranged perpendicular to the data lines;
• a second shorting bar spaced apart from and arranged parallel with the first shorting bar;
• a gate insulation layer covering the gate lines, the first shorting bar, and the second shorting bar, the gate insulation layer having second and third contact holes, wherein the second contact holes are formed over the first shoring bar, and wherein the third contact holes are formed over the second shorting bar;
• a first connector connecting the odd numbered data pads to the first shorting bar through the first contact hole and second contact hole;
• a plurality of second connectors each crossing the first shorting bar and connecting the even numbered data pads to the second shorting bar through the first contact hole and the third contact hole;
• and
• a plurality of island-shaped insulating segments formed between the first shorting bar and each second connector at each intersection of the first shorting bar and the second connector, each island-shaped insulating segment includes at least a passivation layer, a metal layer, a doped amorphous silicon layer, and a pure amorphous silicon layer and electrically insulates the first shorting bar from each second connector.

A liquid crystal display device, comprising:

• a substrate;
• a plurality of gate lines on the substrate;
• a plurality of data lines on the substrate and disposed perpendicular to the plurality of gate lines;
• a first data shorting bar arranged parallel with the plurality of gate lines at a first end of the data lines;
• a second data shorting bar arranged parallel with the plurality of gate lines at a first end of the data lines and spaced apart from the first data shorting bar;
• a plurality of first connectors electrically connecting odd numbered data lines to the first data-shorting bar;
• a plurality of second connectors electrically connecting even numbered data lines to the second data shorting bar;
• and
• a plurality of patterned insulating segments formed over the first shorting bar and below the plurality of second connectors, wherein each patterned insulating segment includes at least a passivation layer, a metal layer, a doped amorphous silicon layer, and a pure amorphous silicon layer and is disposed at an intersection between the first data shorting bar and each second connector.

An array substrate for a liquid crystal display device, comprising:

• a substrate;
• a plurality of gate lines and data lines arranged on the substrate;
• a first data shorting bar arranged parallel with the plurality of gate lines and connected to odd-numbered ones of the data lines;
• a second data shorting bar arranged parallel with the plurality of gate lines and spaced apart from the first data shorting bar and connected to even-numbered ones of the data lines;
• and
• a plurality of patterned insulating layered segments formed over the first shorting bar, wherein each patterned insulating layered segment includes a metal layer.