US 6,642,862 B2 · Method for encoding/decoding digital data transmitted through a serial link, particularly of the 8B/10 type, and device for implementing same

Abstract

A method and a device is disclosed for encoding/decoding digital data transmitted through a serial link, particularly of the so-called “8B/10B” type. A full encoded binary word includes 8 data bits and a 2-bit label. The logical state of a center bit triplet of the byte is detected. When all of the bits are in the same logical state, the center bit of the triplet is inverted prior to transmission. Otherwise, the byte is transmitted as is. The label is forced to the logical configuration “10” when there is a bit inversion, and to “01” in the opposite case. Upon decoding, this configuration is tested and the center bit received is selectively inverted as a function of the result of the test. In a preferred variant, the method also includes tests of the label and the triplet after decoding, when there has been a bit inversion in the encoding. The device comprises logical circuits based on inverters and “AND,” “OR” and “EXCLUSIVE-OR” logic gates.

Claims12

Dependent claims

A method for encoding/decoding digital data to be transmitted through a serial link, said digital data comprising a first data bit sequence and a second label bit sequence, said first and second sequences having first (m) and second (p) given bit lengths, said method comprising:

an encoding phase comprising checking at least one slice of at least two consecutive bits, each of said slices being located in a predetermined area of said first bit sequence, so as to create a partitioning of the latter into parts of approximately equal length, said checking step including performing a test to determine whether the consecutive bits of each of said slices are in a same logical state, setting the bits of said second sequence to predetermined logical state configurations in one-to-one relation with a result of said test, and inverting at least one bit of said slices when the result of said test is positive and transmitting said first bit sequence without any modifications when the result of said test is negative.

A device for encoding/decoding digital data to be transmitted through a serial link, said digital data comprising a first data bit sequence and a second label bit sequence, said first and second sequences having first (m) and second (p) given bit lengths, said device comprising:

an encoder having at least one first element for checking at least one slice of at least two consecutive bits, each of said slices located in a predetermined area of said first bit sequence, so as to create a partitioning of the latter into parts of approximately equal length, said first element performing a test to determine whether consecutive bits of each of said slices are in a same logical state, and delivering an output signal at an output in a first given logical state when said test is positive and in a second given logical state when said test is negative,
a second element having a first and second input, said second element receiving the output signal from said first element through the first input and a given bit of said slices through the second input, so as to transmit it unchanged when said test is negative and to invert it when said test is positive, and
a third element driven by said output signal for generating predetermined logical configurations, in one-to-one relation.

Dependencies are inferred from the claim text.

Method for encoding/decoding digital data transmitted through a serial link, particularly of the 8B/10 type, and device for implementing same

Life of this patent

Method for encoding/decoding digital data transmitted through a serial link, particularly of the 8B/10 type, and device for implementing same

Life of this patent

Abstract

Claims12