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US 6,642,861 B1Granted
Arrangements having ternary-weighted parameter stepping
AssigneeIntel Corporation
InventorHemmige D. Varadarajan
Life of this patent
Estimating the term…
Abstract
Ternary weighted arrangements, for example, arrangements (delay circuits, devices, systems) including a variable delay determined on a ternary basis for use in testing set-up and hold times of a latch.
Claims33
A parameter-stepping circuit comprising:
- a plurality of blocks having parameter values which differ from one another according to powers of three, each block selectably connectable to apply its parameter value to a first circuit branch and a second circuit branch.
A delay circuit comprising:
- a plurality of blocks having delay values which differ from one another according to powers of three, each block selectably connectable to apply its delay value to a first circuit branch and a second circuit branch.
A parameter-stepping method comprising:
- providing a plurality of blocks having parameter values which differ from one another according to powers of three, each block selectably connectable to apply its parameter value to a first circuit branch and a second circuit branch;
- and,
- selectably connecting ones of the blocks to ones of the first circuit branch and the second circuit branch.
A system comprising:
- at least one of an input device and output device;
- a power supply operative to supply power throughout the system;
- and
- a parameter-stepping circuit including:
- a plurality of blocks having parameter values which differ from one another according to powers of three, each block selectably connectable to apply its parameter value to a first circuit branch and a second circuit branch.
2 more elements
Dependencies are inferred from the claim text.