Multi-layer chip directional coupler
AssigneeSamsung Electro-Mechanics Co., Ltd.
InventorsJi-Hwan Shin, Seung-Gyo Jeong
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Abstract
Disclosed herein is a multi-layer chip directional coupler. The multi-layer chip directional coupler has a first ground pattern, a coupling signal line, a main signal line, a second ground pattern, and a plurality of ports. The first ground pattern is formed on the upper surface of a first dielectric layer. The coupling signal line is formed of a conduction pattern on the upper surface of a second dielectric layer. The main signal line is formed of a conduction pattern on the upper surface of a third dielectric layer formed over the second dielectric layer. The second ground pattern formed on the upper surface of a fourth dielectric layer formed over the third dielectric layer. A plurality of ports is formed on the side surfaces of the first to fourth dielectric layers.
Claims4
A multi-layer chip directional coupler, comprising:
- a first ground pattern formed on the upper surface of a first dielectric layer;
- a coupling signal line formed of a conduction pattern on the upper surface of a second dielectric layer formed over the first dielectric layer;
- a main signal line formed of a conduction pattern on the upper surface of a third dielectric layer formed over the second dielectric layer, the main signal line being shorter than the coupling signal line;
- a second ground pattern formed on the upper surface of a fourth dielectric layer formed over the third dielectric layer;
- and
- a plurality of ports formed on the side surfaces of the first to fourth dielectric layers and connected to the main signal line, the coupling signal line, and the first and second ground patterns.
Dependencies are inferred from the claim text.