Spurious-free fractional-N frequency synthesizer with multi-phase network circuit
AssigneeATI Technologies, Inc.
InventorsOleg Drapkin, Chak Cheung Ho, Ngar Sze Chan, Grigori Temkine, Ho Ming Wan
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Abstract
A spurious-free fractional-N frequency synthesizer circuit is disclosed. The synthesizer circuit includes a multi-phase network circuit operative to provide output signals that are at least a 1/(2n+1)) fractional version of the input signal. The synthesizer circuit includes a phase lock loop (PLL) circuit, with the multi-phase network circuit being coupled to the negative feedback loop of the PLL. The multi-phase network circuit includes a smoothing circuit that removes any jitter present at the output of the PLL.
Claims13
A frequency synthesizer circuit, comprising:
- a phase lock loop circuit, including an input, an output and a feedback network;
- and
- a multi-phase delay lock loop circuit, coupled to the feedback network of the phase lock loop circuit, the delay lock loop circuit generating jitter-free fractional versions of the output of the phase lock loop circuit.
A frequency synthesizer circuit, comprising:
- an input;
- an output;
- a phase lock loop circuit having a loop input and a loop output, the phase lock loop circuit receiving an input signal at a first loop input, the loop output providing an output signal;
- and
- a multi-phase network circuit coupled as a negative feedback element of the phase lock loop circuit, operative to provide multiple phase versions of the loop output signal, the multi-phase network including a smoothing circuit operative to combine filtered versions of the loop output signal to each of the multiple phase output signals, the filtered multiple phase output signals being coupled to a second loop input.
Dependencies are inferred from the claim text.