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US 6,642,599 B1Granted
Semiconductor device and method of manufacturing the same
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsKiyoto Watabe, Tomohide Terashima
Life of this patent
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Abstract
A high resistance n-type base layer is formed on a silicon substrate with an insulating layer made of a silicon oxide film therebetween. In the high resistance n-type base layer a p-ch MOS transistor is formed. The p-ch MOS transistor is electrically isolated from another element by trench isolation formed of a trench. A p+ source layer in the p-ch MOS transistor surrounds a periphery of a p+ drain layer and has, for example, an elliptical planar configuration. A semiconductor device thus formed has a high drive capacity and is suitable to high integration.
Claims16
A semiconductor device, comprising:
- a semiconductor substrate having a main surface;
- and a semiconductor layer formed on the main surface of said semiconductor substrate with an insulating layer therebetween, and having an element formation region for forming an element having an insulated gate transistor portion and another element formation region for forming another element, wherein
- said semiconductor layer is provided with a trench surrounding at the surface of said semiconductor layer a periphery of said element formation region for electrically isolating said element formation region from said another element formation region,
- said insulated gate transistor has a source region and a drain region spaced from each other and formed at the surface of said semiconductor layer, and
- said source region is located in said element formation region at said surface of said semiconductor layer and surrounds said drain region, the semiconductor device further comprising a source leading interconnection layer electrically connected to said source region, and
- a drain leading interconnection layer electrically connected to said drain region, wherein
- said drain leading interconnection layer extends above said source leading interconnection layer in a direction crossing said source leading interconnection layer and electrically isolated from said source leading interconnection layer.
4 more elements
Dependencies are inferred from the claim text.