Semiconductor memory and method for fabricating the same
AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsHisashi Ogawa, Yoshihiro Mori, Akihiko Tsuzumitani
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AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsHisashi Ogawa, Yoshihiro Mori, Akihiko Tsuzumitani
Estimating the term…
In a memory cell of a DRAM, that is, a semiconductor memory, a bit line connected to a bit line plug and a local interconnect are provided on a first interlayer insulating film. A connection conductor film of TiAlN is provided on the top and side faces of an upper barrier metal and side faces of a Pt film and a BST film. No contact is formed above the Pt film used for forming an upper electrode, and the upper electrode is connected to an upper interconnect (namely, a Cu interconnect) through the connection conductor film, a dummy lower electrode, a dummy cell plug and the local interconnect. Since the Pt film is not exposed to a reducing atmosphere, the characteristic degradation of a capacitor insulating film can be prevented.
A semiconductor memory comprising:
Dependencies are inferred from the claim text.