Method for ultra thin resist linewidth reduction using implantation

A method for forming a semiconductor structure exhibiting controlled linewidth reduction comprising:

• depositing an ultra thin resist onto a semiconductor substrate having a device film layer formed thereon;
• patterning an image onto the ultra thin resist, the image having at least a first linewidth;
• implanting the ultra thin resist with a dopant, wherein implanting the ultra thin resist with the dopant causes the ultra thin resist to undergo a densification process which facilitates a controlled reduction of the ultra thin resist linewidth associated with an ultra thin resist feature;
• isotropically etching the implanted ultra thin resist;
• and
• anisotropically etching the patterned image into the device film layer, the patterned image having a second linewidth less than the first linewidth.

A method for forming a semiconductor structure exhibiting controlled linewidth reduction comprising:

• depositing an ultra thin resist onto a semiconductor substrate having a device film layer formed thereon, an etch stop layer formed over the device film layer and a protective layer formed over the etch stop layer;
• patterning an image onto the ultra thin resist, the image having at least a first linewidth;
• implanting the ultra thin resist with a dopant, wherein implanting the ultra thin resist with the dopant causes the ultra thin resist to undergo a densification process which facilitates a controlled reduction of the ultra thin resist linewidth associated with an ultra thin resist feature;
• isotropically etching the protective layer;
• anisotropically etching the patterned image into the etch stop layer, the patterned image having a second linewidth less than the first linewidth;
• and
• anisotropically etching the patterned image into the device film layer.

A method for forming a semiconductor structure on a wafer exhibiting controlled linewidth reduction comprising:

• depositing an ultra thin resist onto a semiconductor substrate having a device film layer formed thereon, an etch stop layer formed over the device film layer and a protective layer formed over the etch stop layer;
• patterning an image onto the ultra thin resist, the image having at least a first linewidth;
• implanting the ultra thin resist with a neutral-type dopant at an energy level of 6 keV and at 60 degrees normal to the wafer plane, wherein implanting the ultra thin resist with the dopant causes the ultra thin resist to undergo a densification process which facilitates a controlled reduction of the ultra thin resist linewidth associated with an ultra thin resist feature;
• isotropically etching the protective layer;
• anisotropically etching the patterned image into the etch stop layer, the patterned image having a second linewidth less than the first linewidth;
• and
• anisotropically etching the patterned image into the device film layer.