RELACS shrink method applied for single print resist mask for LDD or buried bitline implants using chemically amplified DUV type photoresist

A method of forming a graded unction for a device on a semiconductor substrate, the method comprising the steps of:

• forming a first masking pattern overlying a surface of the semiconductor substrate, the first masking pattern having a first opening associated with a first region of the semiconductor substrate, wherein the first opening has a first lateral dimension;
• doing the semiconductor substrate with a first dopant of a first conductivity type, wherein the first masking pattern is used as a doping mask to form a first dopant region in the semiconductor substrate;
• swelling the first masking pattern to decrease the first lateral dimension of the first opening to a second lateral dimension, wherein the second lateral dimension is smaller than the first lateral dimension, and wherein the swelled doping mask overlies one or more portions of the first dopant region;
• doping the semiconductor substrate with a second dopant of a second conductivity type, wherein the swelled first masking pattern is used as a doping mask to form a second dopant region in the semiconductor substrate;
• and
• removing the first masking pattern after doping the semiconductor substrate with the first dopant and the second dopant;
• forming a dielectric layer overlying the surface of the semiconductor substrate;
• forming polysilicon layer overlying the dielectric layer;
• forming a second masking pattern overlying the first region of the semiconductor substrate;
• etching the polysilicon layer and the dielectric layer using the second masking pattern and the semiconductor substrate as an etch stop, thereby forming a gate of a lightly-doped-drain (LDD) transistor;
• and
• removing the second masking pattern.