Method of manufacturing an integrated circuit with a dielectric diffusion barrier layer formed between interconnects and interlayer dielectric layers
AssigneeAdvanced Micro Devices, Inc.
InventorsSteven C. Avanzino, Pin-Chin Connie Wang, Minh Van Ngo
Life of this patent
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Abstract
An integrated circuit and manufacturing method therefor is provided having a semiconductor substrate with a semiconductor device. A dielectric layer formed over the semiconductor substrate has an opening provided therein. The dielectric layer is of non-barrier dielectric material capable of being changed into a barrier dielectric material. The dielectric layer around the opening is changed into the barrier dielectric material and the conductor core material is deposited to fill the opening. The conductor core is processed to form a channel for the integrated circuit.
Claims10
A method of manufacturing an integrated circuit comprising:
- providing a semiconductor substrate having a semiconductor device provided thereon;
- forming a dielectric layer of non-barrier dielectric material capable of being reduced into a barrier dielectric material, the dielectric layer formed over the semiconductor substrate;
- forming an opening in the non-barrier dielectric layer;
- reducing the dielectric layer to change the non-barrier dielectric material around the opening to form a barrier dielectric material around the opening;
- and
- depositing a conductor core over the dielectric layer to fill the opening and connect to the semiconductor device.
A method of manufacturing an integrated circuit comprising:
- providing a semiconductor substrate having a semiconductor device provided thereon;
- forming a dielectric layer of non-barrier dielectric material capable of being reduced into a barrier dielectric material, the dielectric layer formed over the semiconductor substrate;
- forming an opening in the non-barrier dielectric layer;
- reducing the dielectric layer to change the non-barrier dielectric material around the opening to form a barrier dielectric material around the opening;
- depositing a seed layer over the dielectric layer to line the opening;
- depositing a conductor core over the seed layer to fill the opening and connect to the semiconductor device;
- and
- planarizing the conductor core and the seed layer to form a channel.
Dependencies are inferred from the claim text.